IDT7024L IDT [Integrated Device Technology], IDT7024L Datasheet - Page 13

• Manufacturer Part Number: IDT7024L
• Description: HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM
• Manufacturer: IDT [Integrated Device Technology]

IDT7024S/L
HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT READ AND
NOTES:
1. To ensure that the earlier of the two ports wins. t
2.
3.
4. If M/
5. All timing is the same for both left and right ports. Port "A" may be either the left or right Port. Port "B" is the port opposite from port "A".
TIMING WAVEFORM OF WRITE WITH
NOTES:
1. t
2. Busy is asserted on port "B" Blocking R/
3. t
DATA
CE
OE
DATA
WH
WB
ADDR
ADDR
BUSY
L
= V
must be met for both
is only for the Slave Version.
=
S
R/
OUT "B"
= V
CE
IN "A"
W
IL
R
for the reading port.
IL
"A"
"A"
"B"
"B"
= V
(slave),
IL
.
t
APS
BUSY
BUSY
(1)
R/
R/
BUSY
W
W
is an input. Then for this example
"A"
"B"
"B"
input (slave) and output (master).
W
"B", until
APS
t
WB
BUSY
is ignored for M/
(3)
"B" goes High.
BUSY
BUSY
BUSY
BUSY
BUSY
t
BAA
BUSY
t
MATCH
WP
"A"
(2)
S
t
= V
WC
= V
6.15
IH
IL
and
(slave).
BUSY
t
WP
"B"
MILITARY AND COMMERCIAL TEMPERATURE RANGES
input is shown above.
t
MATCH
DW
t
t
WDD
WH
VALID
(1)
2740 drw 14
BUSY
BUSY
BUSY
BUSY
BUSY
t
DDD
(M/
(3)
S S
S
S
S
t
BDA
= V
t
DH
IH
)
(2,4,5)
2740 drw 13
t
BDD
VALID
13