ACS10DMSR INTERSIL [Intersil Corporation], ACS10DMSR Datasheet

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... NAND gate. A high on all inputs forces the output to a low state. The ACS10MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS Logic Family. Ordering Information PART NUMBER TEMPERATURE RANGE ACS10DMSR ACS10KMSR ACS10D/Sample ACS10K/Sample ACS10HMSR Truth Table INPUTS ...

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Absolute Maximum Ratings Supply Voltage (VCC -0.5V to +6.0V Input Voltage Range . . . . ...

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TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL Propagation Delay TPHL VCC = 4.5V, VIH = 4.5V, VIL = 0V TPLH VCC = 4.5V, VIH = 4.5V, VIL = 0V NOTES: 1. All voltages referenced to device GND ...

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PARAMETER Supply Current Output Current NOTE: 1. All delta calculations are referenced to 0 hour readings or pre-life readings. CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test 1 (Postburn-In) Interim Test 2 (Postburn-In) PDA Interim Test 3 (Postburn-In) PDA Final Test ...

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Intersil - Space Products MS Screening Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull Method 2023 100% Internal Visual Inspection Method 2010 100% Temperature Cycling ...

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Die Characteristics DIE DIMENSIONS: 88 mils x 88 mils 2,240mm x 2,240mm METALLIZATION: Type: AlSiCu Å Metal 1 Thickness: 6.75k (Min), 8.25k Å Å Metal 2 Thickness: 9k (Min), 11k GLASSIVATION: Type: SiO 2 Å Å Thickness Metallization ...

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Ceramic Dual-In-Line Metal Seal Packages (SBDIP) -A- - bbb BASE S2 PLANE -C- SEATING PLANE ccc ...

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Ceramic Metal Seal Flatpack Packages (Flatpack) e PIN NO AREA - 0.004 0.036 - SEATING AND BASE PLANE c1 LEAD FINISH ...