IDT72V84 IDT [Integrated Device Technology], IDT72V84 Datasheet

IDT72V84

Manufacturer Part Number

IDT72V84

Description

3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUAL 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,096 X 9 DUAL 8,192 X 9

Manufacturer

IDT [Integrated Device Technology]

Datasheet

1.IDT72V84.pdf (12 pages)

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FEATURES:

• • • • •

FUNCTIONAL BLOCK DIAGRAM

IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. The AsyncFIFO™ is a trademark of Integrated Device Technology, Inc.

COMMERICAL TEMPERATURE RANGE

The IDT72V81 is equivalent to two IDT72V01 - 512 x 9 FIFOs

The IDT72V82 is equivalent to two IDT72V02 - 1,024 x 9 FIFOs

The IDT72V83 is equivalent to two IDT72V03 - 2,048 x 9 FIFOs

The IDT72V84 is equivalent to two IDT72V04 - 4,096 x 9 FIFOs

The IDT72V85 is equivalent to two IDT72V05 - 8,192 x 9 FIFOs

Low power consumption

— Active: 330 mW (max.)

— Power-down: 18 mW (max.)

Ultra high speed—15 ns access time

Asynchronous and simultaneous read and write

Offers optimal combination of data capacity, small foot print

and functional flexibility

Ideal for bidirectional, width expansion, depth expansion, bus-

matching, and data sorting applications

Status Flags: Empty, Half-Full, Full

Auto-retransmit capability

High-performance CEMOS™ technology

Space-saving TSSOP package

Industrial temperature range (–40° ° ° ° ° C to +85° ° ° ° ° C) is available

Green parts available, see ordering information

XIA

CONTROL

WRITE

READ

EXPANSION

LOGIC

FLAG

XOA/HFA

POINTER

WRITE

FFA

BUFFERS

THREE-

STATE

EFA

3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO

DUAL 512 x 9, DUAL 1,024 x 9

DUAL 2,048 x 9, DUAL 4,096 X 9

DUAL 8,192 X 9

DATA INPUTS

(DA

OUTPUTS

(QA

ARRAY A

1,024 x 9

2,048 x 9

4,096 x 9

8,192 x 9

512 x 9

DATA

RAM

-DA

-QA

)

POINTER

READ

FLA/RTA

RESET

LOGIC

RSA

DESCRIPTION:

load and empty data on a first-in/first-out basis. These devices are functional and

compatible to two IDT72V01/72V02/72V03/72V04/72V05 FIFOs in a single

package with all associated control, data, and flag lines assigned to separate

pins. The devices use Full and Empty flags to prevent data overflow and

underflow and expansion logic to allow for unlimited expansion capability in both

word size and depth.

pointers, with no address information required to load and unload data. Data

is toggled in and out of the devices through the use of the Write (W) and Read

(R) pins.

bits at the user’s option. This feature is especially useful in data communications

applications where it is necessary to use a parity bit for transmission/reception

error checking. It also features a Retransmit (RT) capability that allows for reset

of the read pointer to its initial position when RT is pulsed low to allow for

retransmission from the beginning of data. A Half-Full Flag is available in the

single device mode and width expansion modes.

They are designed for those applications requiring asynchronous and simul-

taneous read/writes in multiprocessing and rate buffer applications.

The IDT72V81/72V82/72V83/72V84/72V85 are dual-FIFO memories that

The reads and writes are internally sequential through the use of ring

The devices utilize a 9-bit wide data array to allow for control and parity

These FIFOs are fabricated using IDT’s high-speed CMOS technology.

XIB

CONTROL

WRITE

READ

EXPANSION

LOGIC

FLAG

XOB/HFB

POINTER

WRITE

FFB

BUFFERS

THREE-

STATE

EFB

DATA INPUTS

(DB

OUTPUTS

(QB

ARRAY A

1,024 x 9

2,048 x 9

4,096 x 9

8,192 x 9

FEBRUARY 2009

DATA

512 x 9

RAM

-DB

-QB

)

POINTER

IDT72V81

IDT72V82

IDT72V83

IDT72V84

IDT72V85

READ

FLB/RTB

RESET

LOGIC

DSC-3966/3

RSB

3966 drw 01

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