cx82100 Conexant Systems, Inc., cx82100 Datasheet - Page 198

• Manufacturer Part Number: cx82100
• Description: Home Network Processor Hnp
• Manufacturer: Conexant Systems, Inc.

11.2.2
11-2
23:21
Bit
31
30
29
28
27
26
25
24
20
19
Type
RO
RR
RR
RR
RR
RR
RR
RR
RR
Interrupt Status Register (INT_Stat: 0x00350044)
Default
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
1’b0
Conexant Proprietary and Confidential Information
Each interrupt source sets a bit in the interrupt status register (INT_Stat). These pending
interrupts can be read at anytime. If a bit in this register represents multiple interrupt
sources, then it is read-only. Most bits are automatically cleared once all the
corresponding interrupt sources are cleared, however, bits 19 and 20 are not
automatically cleared. Any other bit in this register can be cleared by writing a one to the
same bit location. (Note that in some cases, the interrupt source in the peripheral must be
cleared before the clearing of the corresponding interrupt bit in this register can take
effect.).
Writing a zero has no effect.
Int_SW3
Int_SW2
Int_SW1
Int_SW0
Int_COMMRX
Int_COMMTX
Int_GPIO
Int_EMAC#2_ERR
Int_EMAC#1_ERR
CX82100 Home Network Processor Data Sheet
Name
Software Interrupt 3.
Software Interrupt 2.
Software Interrupt 1.
Software Interrupt 0.
ARM9 Communication RXD Channel Interrupt.
ARM9 Communication TXD channel Interrupt.
Reserved.
GPIO Interrupt.
Reserved.
EMAC 2 Exception Condition Interrupt.
EMAC 1 Exception Condition Interrupt.
0 = Interrupt condition has not occurred.
1 = The corresponding data bit has been set high when writing
0 = Interrupt condition has not occurred.
1 = The corresponding data bit has been set high when writing
0 = Interrupt condition has not occurred.
1 = The corresponding data bit has been set high when writing
0 = Interrupt condition has not occurred.
1 = The corresponding data bit has been set high when writing
0 = The receive buffer does not contain data waiting to be
1 = The ARM9 communication RXD channel (between
0 = The transmit buffer is not empty.
1 = The ARM9 communication TXD channel (between
0 = Interrupt condition has not occurred.
1 = An external interrupt through a GPIO input pin has
0 = Interrupt condition has not occurred.
1 = EMAC 2 receiver or transmitter detected a normal or
0 = Interrupt condition has not occurred.
1 = EMAC 1 receiver or transmitter detected a normal or
to INT_SetStat.
to INT_SetStat.
to INT_SetStat.
to INT_SetStat.
read.
processor and the debugger) receive buffer contains data
waiting to be read.
processor and the debugger) transmit buffer is empty.
occurred.
abnormal exception condition. Must be written to be
cleared.
abnormal exception condition. Must be written to be
cleared.
Description
101306C