TP0620N3 SUTEX [Supertex, Inc], TP0620N3 Datasheet

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TP0620N3

Manufacturer Part Number
TP0620N3
Description
P-Channel Enhancement-Mode Vertical DMOS FETs
Manufacturer
SUTEX [Supertex, Inc]
Datasheet
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*
Ordering Information
Features
❏ Low threshold — -2.4 V max
❏ High input impedance
❏ Low input capacitance — 85pF typical
❏ Fast switching speeds
❏ Low on resistance
❏ Free from secondary breakdown
❏ Low input and output leakage
❏ Complementary N- and P-channel devices
Applications
❏ Logic level interfaces – ideal for TTL and CMOS
❏ Solid state relays
❏ Battery operated systems
❏ Photo voltaic drives
❏ Analog switches
❏ General purpose line drivers
❏ Telecom switches
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Distance of 1.6 mm from case for 10 seconds.
MIL visual screening available
BV
BV
-200V
DSS
DGS
/
R
(max)
12Ω
DS(ON)
-0.75A
(min)
I
D(ON)
-55°C to +150°C
P-Channel Enhancement-Mode
Vertical DMOS FETs
V
(max)
-2.4V
BV
BV
300°C
GS(th)
± 20V
DGS
DSS
Order Number / Package
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transistors
and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Package Option
Note: See Package Outline section for dimensions.
TP0620N3
TO-92
TO-92
S G D
Low Threshold
TP0620

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TP0620N3 Summary of contents

Page 1

... Package Option BV DSS BV DGS ± 20V -55°C to +150°C 300°C Note: See Package Outline section for dimensions. TP0620 Low Threshold TO-92 TP0620N3 TO-92 ...

Page 2

Thermal Characteristics Package I (continuous)* D TO-92 -175mA * I (continuous) is limited by max rated Electrical Characteristics Symbol Parameter BV Drain-to-Source Breakdown Voltage DSS V Gate Threshold Voltage GS(th) ∆V Change in V with Temperature ...

Page 3

Typical Performance Curves ° ° ° ° 3 TP0620 ° ° ...

Page 4

Typical Performance Curves BV Variation with Temperature DSS 1.15 1.1 1.05 1.0 0.95 0.9 - (°C) j Transfer Characteristics -2 -25V DS -1 (volts) GS Capacitance vs. Drain-to-Source Voltage 200 ...

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