hy5ps1g821m Hynix Semiconductor, hy5ps1g821m Datasheet - Page 61

• Manufacturer Part Number: hy5ps1g821m
• Description: 1gb Ddr2 Sdram
• Manufacturer: Hynix Semiconductor

Rev. 0.2 / Oct. 2005
5.2.4 Differential Input AC logic Level
1. V
UDQS.
2. V
or UDQS) level and V
IL(DC)
Notes:
1. V
LDQS or UDQS) and V
- V
2. The typical value of V
VDDQ . V
5.2.5 Differential AC output parameters
Notes:
1. The typical value of V
in VDDQ . V
Symbol
Symbol
IL(AC)
V
V
V
IN(DC)
ID(DC
ID(AC)
.
OX
ID
IX
(ac)
(ac)
(ac)
.
) specifies the input differential voltage |V
specifies the input differential voltage |V
specifies the allowable DC execution of each input of differential pair such as CK, CK, DQS, DQS, LDQS, LDQS, UDQS and
IX(AC)
OX(AC)
ac differential input voltage
ac differential cross point voltage
ac differential cross point voltage
indicates the voltage at whitch differential input signals must cross.
indicates the voltage at whitch differential output signals must cross.
CP
CP
IX(AC)
OX(AC)
is the complementary input (such as CK, DQS, LDQS or UDQS) level. The minimum value is equal to V
is the complementary input signal (such as CK, DQS, LDQS or UDQS). The minimum value is equal to V
Parameter
Parameter
V
is expected to be about 0.5 * VDDQ of the transmitting device and V
V
is expected to be about 0.5 * V DDQ of the transmitting device and V
CP
TR
TR
TR
< Differential signal levels >
-V
-V
CP
CP
0.5 * VDDQ - 0.175
0.5 * VDDQ - 0.125
| required for switching, where V
| required for switching, where V
V
V
Min.
Min.
0.5
DDQ
SSQ
V
ID
0.5 * VDDQ + 0.175
0.5 * VDDQ + 0.125
V
DDQ
Max.
Max.
+ 0.6
V
TR
TR
IX or
is the true input signal (such as CK, DQS,
is the true input (such as CK, DQS, LDQS
Crossing point
IX(AC)
V
OX(AC
1HY5PS12421(L)M
OX
Units
Units
HY5PS12821(L)M
V
V
V
is expected to track variations in
) is expected to track variations
Notes
Notes
1
2
1
IH(DC)
61
IH(AC)
- V