p520-00dc PhaseLink Corp., p520-00dc Datasheet

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p520-00dc

Manufacturer Part Number
p520-00dc
Description
Low Phase Noise Vcxo With Multipliers For 100-200mhz Fund Xtal
Manufacturer
PhaseLink Corp.
Datasheet
FEATURES
DESCRIPTION
PLL520-00 is a VCXO IC specifically designed to
pull high frequency fundamental crystals. Its design
was optimized to tolerate higher limits of
interelectrodes capacitance and bonding
capacitance to improve yield. It achieves very low
current into the crystal resulting in better overall
stability. Its internal varicaps allow an on chip
frequency pulling, controlled by the VCON input.
BLOCK DIAGRAM
DIE SPECIFICATIONS
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 1
XOUT
VCON
Pad dimensions
XIN
SEL
Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal)
100MHz to 200MHz Fundamental Mode Crystal.
Output range: 100 – 200MHz (no multiplication),
200 – 400MHz (2x multiplier), 400 – 700MHz (4x
multiplier), or 800MHz – 1GHz (LVDS output
only for 8x multiplier).
Available outputs: PECL, LVDS, or CMOS (High
Drive (30mA) or Standard Drive (10mA) output).
Selectable OE Logic (enable high or enable low).
Integrated variable capacitors.
Supports 3.3V-Power Supply.
Available in die form.
Thickness 10 mil.
Reverse side
Thickness
Name
Size
integrated
Oscillator
Amplifier
varicaps
w/
PLL by-pass
Locked
(Phase
Loop)
PLL
80 micron x 80 micron
65 x 62 mil
10 mil
Value
GND
PLL520-00
OE
Q
Q
OUTPUT SELECTION AND ENABLE
Pad #9, 18, 25: Bond to GND to set to “0”. No connection results to
Pad #30: Logical states defined by PECL levels if OE_SELECT (pad #9)
DIE CONFIGURATION
Y
SEL3^
SEL2^
VCON
XOUT
OE_SELECT
CTRL
OUTSEL1
(Pad #18)
1 (Default)
XIN
(Pad #9)
OE
X
(0,0)
0
0
1
1
0
is “1”
Logical states defined by CMOS levels if OE_SELECT is “0
26
27
28
29
30
31
25
“default” setting through internal pull-up.
1
Note: ^ denotes internal pull up
C502A
A1919-19A
24
2
OUTSEL0
(Pad #25)
Die ID:
1 (Default)
0 (Default)
OE_CTRL
(Pad #30)
23
3
0
1
0
1
22
0
1
4
21
5
65 mil
PLL520-00
High Drive CMOS
Standard CMOS
LVDS
PECL (default)
20
Tri-state
Output enabled
Output enabled
Tri-state
6
Selected Output
19
7
State
18
8
10
12
11
17
16
15
14
13
(1550,1475)
9
GNDBUF
CMOS
LVDSB
PECLB
VDDBUF
VDDBUF
PECL
LVDS
OE_SEL^

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p520-00dc Summary of contents

Page 1

Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal) FEATURES • 100MHz to 200MHz Fundamental Mode Crystal. • Output range: 100 – 200MHz (no multiplication), 200 – 400MHz (2x multiplier), 400 – 700MHz (4x multiplier), or 800MHz – 1GHz ...

Page 2

Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal) FREQUENCY SELECTION TABLE Pad #28 Pad #29 SEL3 SEL2 All pads have internal pull-ups (default value is 1). Bond to GND to ...

Page 3

Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal) 3. Voltage Control Crystal Oscillator PARAMETERS VCXO Stabilization Time * VCXO Tuning Range CLK output pullability On-chip Varicaps control range Linearity VCXO Tuning Characteristic VCON input impedance VCON modulation BW ...

Page 4

Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal) 6. Phase Noise Specifications PARAMETERS FREQUENCY 155.52MHz Phase Noise relative to carrier 622.08MHz Note: Phase Noise measured at VCON = 0V 7. CMOS Electrical Characteristics PARAMETERS Output drive current (High ...

Page 5

Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal) 8. LVDS Electrical Characteristics PARAMETERS Output Differential Voltage V Magnitude Change DD Output High Voltage Output Low Voltage Offset Voltage Offset Magnitude Change Power-off Leakage Output Short Circuit Current 9. ...

Page 6

Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal) 10. PECL Electrical Characteristics PARAMETERS SYMBOL Output High Voltage Output Low Voltage 11. PECL Switching Characteristics PARAMETERS Clock Rise Time Clock Fall Time PECL Levels Test Circuit OUT OUT OUT ...

Page 7

Low Phase Noise VCXO with multipliers (for 100-200MHz Fund Xtal) PAD ASSIGNMENT Pad # Name 1 GND 2 GND 3 GND 4 GND 5 GND 6 N/C 7 GND 8 GNDBUF 9 OE_SELECT 10 LVDS 11 PECL 12 VDDBUF 13 ...

Page 8

... President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/20/04 Page 8 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL520-00 DC Marking P520-00DC PLL520-00 TEMPERATURE C=COMMERCIAL PACKAGE TYPE D=DIE Package Option ...

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