p520-80dc PhaseLink Corp., p520-80dc Datasheet

no-image

p520-80dc

Manufacturer Part Number
p520-80dc
Description
Low Phase Noise Vcxo 9.5-65mhz
Manufacturer
PhaseLink Corp.
Datasheet
FEATURES
DESCRIPTION
The PLL520-80 is a VCXO IC specifically designed to
work with fundamental crystals between 19MHz and
65MHz. The selectable divide by two feature extends
the operation range from 9.5MHz to 65MHz. It
requires very low current into the crystal resulting in
better overall stability. The OE logic feature allows
selection of enable high or enable low. Furthermore,
it provides selectable CMOS, PECL or LVDS outputs.
DIE SPECIFICATIONS
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 011/14/06 Page 1
VCON
XOUT
XIN
19MHz to 65MHz fundamental crystal input.
Output range: 9.5MHz – 65MHz
Complementary outputs: PECL or LVDS output.
Selectable OE Logic (enable high or enable low).
Available outputs: PECL, LVDS, or CMOS (High
Drive (30mA) or Standard Drive (10mA) output).
Integrated variable capacitors.
Supports 2.5V or 3.3V Power Supply.
Available in die form.
Pad dimensions
Reverse side
Thickness
Name
Size
integrated
Oscillator
Amplifier
varicaps
w/
80 micron x 80 micron
PLL520-80
62 x 65 mil
Value
10 mil
GND
S2
OE
Q
Q
Low Phase Noise VCXO (9.5-65MHz)
DIE CONFIGURATION
OUTPUT SELECTION AND ENABLE
Pads #9, #18 & #25: Bond to GND to set to “0”,
OE_CTRL: Logical states defined by PECL levels if OE_SELECT is “1”
OUTPUT FREQUENCY SELECTOR
*Internally set to ‘Default’ through 60KΩ pull-up resistor
Y
OUT_SEL1*
VCON
OE_SELECT
XOUT
CTRL
1 (Default)
(Pad 18)
N/C
XIN
S2^
OE
X
(Pad 9)
(0,0)
0
0
1
1
1(Default)*
0
Logical states defined by CMOS levels if OE_SELECT is “0”
26
27
28
29
30
31
S2
25
0
1
C502A
A2020-20C
OUT_SEL0*
24
2
Die ID:
No connection results to “default” setting
through internal pull-up.
1 (Default)
0 (Default)
OE_CTRL
(Pad 25)
(Pad 30)
23
3
0
1
0
1
0
1
22
4
21
5
65 mil
PLL520-80
20
Output enabled
Output enabled
High Drive CMOS
Standard CMOS
LVDS
PECL (default)
Tri-state
Tri-state
6
Selected Output*
19
Output
Input/2
7
Input
State
18
8
12
10
16
13
11
17
15
14
(1550,1475)
9
GNDBUF
CMOS
LVDSB
PECLB
VDDBUF
VDDBUF
PECL
LVDS
OE_SEL^

Related parts for p520-80dc

p520-80dc Summary of contents

Page 1

FEATURES • 19MHz to 65MHz fundamental crystal input. • Output range: 9.5MHz – 65MHz • Complementary outputs: PECL or LVDS output. • Selectable OE Logic (enable high or enable low). • Available outputs: PECL, LVDS, or CMOS (High Drive (30mA) ...

Page 2

ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model Exposure of the device under conditions beyond the limits ...

Page 3

General Electrical Specifications PARAMETERS Supply Current (Loaded Outputs) Operating Voltage Output Clock Duty Cycle Short Circuit Current 5. Jitter Specifications PARAMETERS Period jitter RMS at 27MHz Period jitter peak-to-peak at 27MHz Accumulated jitter RMS at 27MHz Accumulated jitter peak-to-peak ...

Page 4

LVDS Electrical Characteristics PARAMETERS Output Differential Voltage V Magnitude Change DD Output High Voltage Output Low Voltage Offset Voltage Offset Magnitude Change Power-off Leakage Output Short Circuit Current 9. LVDS Switching Characteristics PARAMETERS Differential Clock Rise Time Differential Clock ...

Page 5

PECL Electrical Characteristics PARAMETERS SYMBOL Output High Voltage Output Low Voltage 11. PECL Switching Characteristics PARAMETERS Clock Rise Time Clock Fall Time PECL Levels Test Circuit OUT 50Ω 50Ω OUT OUT 80% 50% 20% OUT 47745 Fremont Blvd., Fremont, ...

Page 6

PAD DESCRIPTIONS Pad # Name 1 GND 2 GND 3 Optional GND 4 GND 5 GND 6 Reserved 7 GNDBUF 8 GNDBUF 9 OE_SEL 10 LVDS 11 PECL 12 VDDBUF 13 VDDBUF 14 PECLB 15 LVDSB 16 CMOS 17 GNDBUF ...

Page 7

... Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 011/14/06 Page 7 Low Phase Noise VCXO (9.5-65MHz) 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL520-80 DC Marking P520-80DC PLL520-80 TEMPERATURE C=COMMERCIAL I=INDUSTRIAL PACKAGE TYPE D=DIE Package Option ...

Related keywords