PS12001ARN-0 POWERTIP [Powertip Technology], PS12001ARN-0 Datasheet - Page 50

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PS12001ARN-0

Manufacturer Part Number
PS12001ARN-0
Description
OUTLINE DIMENSION & BLOCK DIAGRAM
Manufacturer
POWERTIP [Powertip Technology]
Datasheet
ST7066U
!" Interfacing to the MPU
The ST7066U can send data in either two 4-bit operations or one 8-bit operation, thus allowing interfacing with 4-
or 8-bit MPU.
#" For 4-bit interface data, only four bus lines (DB4 to DB7) are used for transfer. Bus lines DB0 to DB3
$" Example of busy flag check timing sequence
$" Intel 8051 interface
V2.0
are disabled. The data transfer between the ST7066U and the MPU is completed after the 4-bit data has
been transferred twice. As for the order of data transfer, the four high order bits (for 8-bit operation, DB4 to
DB7) are transferred before the four low order bits (for 8-bit operation, DB0 to DB3). The busy flag must be
checked (one instruction) after the 4-bit data has been transferred twice. Two more 4-bit operations then
transfer the busy flag and address counter data.
Internal
operation
R/W
DB7
RS
E
Intel 8051 Serial
Instruction write
IR7
P1.0 to P1.3
IR3
P3.0
P3.1
P3.2
Functioning
Busy flag check
4
27/42
AC3
DB4 to DB7
RS
R/W
E
ST7066U
COM1 to COM16
SEG1 to SEG40
Busy flag check
Busy
Not
AC3
40
16
IR7
Instruction write
IR3
2001/03/01

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