LTC3414 LINER [Linear Technology], LTC3414 Datasheet - Page 6

• Manufacturer Part Number: LTC3414
• Description: 4A, 4MHz, Monolithic Synchronous Step-Down Regulator
• Manufacturer: LINER [Linear Technology]

BLOCK DIAGRA
LTC3414
OPERATIO
Main Control Loop
The LTC3414 is a monolithic, constant-frequency, cur-
rent-mode step-down DC/DC converter. During normal
operation, the internal top power switch (P-channel
MOSFET) is turned on at the beginning of each clock cycle.
Current in the inductor increases until the current com-
parator trips and turns off the top power MOSFET. The
peak inductor current at which the current comparator
shuts off the top power switch is controlled by the voltage
on the I
the I
resistor divider on the V
reference. When the load current increases, it causes a
reduction in the feedback voltage relative to the reference.
The error amplifier raises the I
inductor current matches the new load current. When the
top power MOSFET shuts off, the synchronous power
switch (N-channel MOSFET) turns on until either the
bottom current limit is reached or the beginning of the next
6
TH
TH
pin by comparing the feedback signal from a
pin. The error amplifier adjusts the voltage on
RUN/SS
PGOOD
V
FB
U
19
17
4
RUN
0.74V
0.86V
W
FB
0.8V
–
–
–
+
+
+
TH
pin with an internal 0.8V
SV
16
IN
AMPLIFIER
voltage until the average
REFERENCE
SYNC/MODE
VOLTAGE
ERROR
SGND
5
I
TH
18
V
+
COMPENSATION
EXPOSED PAD
–
+
OSCILLATOR
RECOVERY
COMPARATOR
SLOPE
RT
21
BURST
2
BCLAMP
SYNC/MODE
LOGIC
3
clock cycle. The bottom current limit is set at –5A for
forced continuous mode and 0A for Burst Mode operation.
The operating frequency is externally set by an external
resistor connected between the RT pin and ground. The
practical switching frequency can range from 300kHz to
4MHz.
Overvoltage and undervoltage comparators will pull the
PGOOD output low if the output voltage comes out of
regulation by 7.5%. In an overvoltage condition, the top
power MOSFET is turned off and the bottom power MOSFET
is switched on until either the overvoltage condition clears
or the bottom MOSFET’s current limit is reached.
Forced Continuous Mode
Connecting the SYNC/MODE pin to SV
Mode operation and force continuous current operation.
At light loads, forced continuous mode operation is less
efficient than Burst Mode operation, but may be desirable
in some applications where it is necessary to keep switch-
NMOS CURRENT
COMPARATOR
COMPARTOR
REVERSAL
CURRENT
COMPENSATION
PMOS CURRENT
COMPARATOR
SLOPE
+
–
–
+
+
–
PGND
20
PV
7
IN
PV
14
IN
3414 BD
12
13
10
11
8
9
1
IN
SW
SW
SW
SW
PGND
PGND
PGND
will disable Burst
3414f