SC16C2552 Philips Semiconductors, SC16C2552 Datasheet - Page 3

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SC16C2552

Manufacturer Part Number
SC16C2552
Description
Dual UART with 16-byte transmit and receive FIFOs
Manufacturer
Philips Semiconductors
Datasheet

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5. Pinning information
Table 2:
9397 750 11636
Product data
Symbol
A2-A0
CHSEL
CS
D0-D7
GND
Pin description
Pin
10, 14,
15
16
18
2-9
12, 22
5.1 Pinning
5.2 Pin description
Type
I
I
I
I/O
I
Fig 2. PLCC44 pin configuration.
Description
Register select. A0-A2 are used during read and write operations to select the UART
register to read from or write to.
Channel Select. UART channel A or B is selected by the logical state of this pin when
the CS is a logic 0. A logic 0 on CHSEL selects the UART channel ‘B’, while a logic 1
selects UART channel ‘A’.
Chip Select (Active-LOW). This function is selects channel ‘A’ or ‘B’, in accordance
with the logical state of the CHSEL pin. This allows data to be transferred between the
user CPU and the SC16C2552, or the SC16C2552 and the CPU for a channel selected
by CHSEL. MF[0] overrides CHSEL while in the write cycle mode, allowing the user to
write both channel registers simultaneously with one write cycle.
Data bus (bi-directional). These pins are the 8-bit, 3-State data bus for transferring
information to or from the controlling CPU. D0 is the least significant bit and the first
data bit in a transmit or receive serial data stream.
Signal and power ground.
CHSEL
XTAL1
XTAL2
INTB
GND
D5
D6
D7
A0
A1
A2
10
11
12
13
14
15
16
17
7
8
9
Rev. 03 — 20 June 2003
Dual UART with 16-byte transmit and receive FIFOs
SC16C2552IA44
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
SC16C2552
002aaa124
39
38
37
36
35
34
33
32
31
30
29
RXA
TXA
DTRA
RTSA
MFA
INTA
V cc
TXRDYB
RIB
CDB
DSRB
3 of 38

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