MT48LC16M4A2 Micron Technology, MT48LC16M4A2 Datasheet
MT48LC16M4A2
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MT48LC16M4A2 Summary of contents
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... Not recommended for new designs. 5. Shown for PC100 compatibility. 64Mb: x4, x8, x16 SDRAM 64MSDRAM_F.p65 – Rev. F; Pub. 1/03 MT48LC16M4A2 – 4 Meg banks MT48LC8M8A2 – MT48LC4M16A2 – 1 Meg banks For the latest data sheet, please refer to the Micron Web site: www ...
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... SDRAM PART NUMBERS PART NUMBER ARCHITECTURE MT48LC16M4A2TG 16 Meg x 4 MT48LC8M8A2TG 8 Meg x 8 MT48LC4M16A2TG 4 Meg x 16 GENERAL DESCRIPTION ® The Micron 64Mb SDRAM is a high-speed CMOS, dynamic random-access memory 67,108,864 bits internally configured as a quad- bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4’ ...
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... Write – With Auto Precharge ....................... 49 Single Write – Without Auto Precharge ...... 50 Single Write – With Auto Precharge ............ 51 Alternating Bank Write Accesses ................... 52 Write – Full-Page Burst .................................. 53 Write – DQM Operation ............................... 54 Micron Technology, Inc., reserves the right to change products or specifications without notice. 3 64Mb: x4, x8, x16 SDRAM © ...
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... LOGIC 2 COLUMN DECODER COLUMN- 10 ADDRESS COUNTER/ LATCH 4 64Mb: x4, x8, x16 BANK3 BANK2 BANK1 BANK0 1 ARRAY DATA OUTPUT 4 REGISTER 4096 DATA INPUT 4 1024 REGISTER (x4) Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM 1 DQM 4 DQ0-DQ3 ©2003, Micron Technology, Inc. ...
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... LOGIC 2 COLUMN DECODER COLUMN- 9 ADDRESS COUNTER/ LATCH 5 64Mb: x4, x8, x16 BANK3 BANK2 BANK1 BANK0 1 ARRAY DATA OUTPUT 8 REGISTER 4096 DATA INPUT 8 512 REGISTER (x8) Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM 1 DQM 8 DQ0-DQ7 ©2003, Micron Technology, Inc. ...
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... DECODER COLUMN- 8 ADDRESS COUNTER/ LATCH 6 64Mb: x4, x8, x16 BANK3 BANK2 BANK1 BANK0 2 ARRAY DATA OUTPUT 16 REGISTER 4096 DATA INPUT 16 256 REGISTER (x16) Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM 2 DQML, DQMH 16 DQ0-DQ15 ©2003, Micron Technology, Inc. ...
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... Supply DQ Power: Isolated DQ power on the die for improved noise immunity. Supply DQ Ground: Isolated DQ ground on the die for improved noise immunity. Supply Power Supply: +3.3V ±0.3V. Supply Ground. 7 64Mb: x4, x8, x16 SDRAM DESCRIPTION Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. ...
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... The remaining (least significant) address bit(s) is (are) used to select the starting loca- tion within the block. Full-page bursts wrap within the page if the boundary is reached. 8 64Mb: x4, x8, x16 SDRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. ...
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... For a burst length of one, A0-A9 (x4), A0-A8 (x8), or A0-A7 (x16) select the unique column to be accessed, and mode register bit M3 is ignored. Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM Type = Interleaved 0-1 1-0 ...
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... DON’T CARE UNDEFINED 10 64Mb: x4, x8, x16 SDRAM Table 2 CAS Latency ALLOWABLE OPERATING FREQUENCY (MHz) CAS CAS LATENCY = 2 LATENCY = 3 – 133 100 100 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. 166 143 133 125 ...
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... – – – – L – – – – H Micron Technology, Inc., reserves the right to change products or specifications without notice. 11 SDRAM ADDR DQs NOTES Bank/Row X 3 Bank/Col X 4 Bank/Col Valid 4 X Active Code ...
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... READ or WRITE command prior to the BURST TERMINATE command will be truncated, as shown in the Operation section of this data sheet. 12 64Mb: x4, x8, x16 SDRAM t RP) after the PRECHARGE t RP) is completed. This is Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. ...
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... Upon exiting the self refresh mode, AUTO REFRESH commands must be issued every 15.625µs or less as both SELF REFRESH and AUTO REFRESH utilize the row refresh counter. Micron Technology, Inc., reserves the right to change products or specifications without notice. 13 SDRAM ©2003, Micron Technology, Inc. ...
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... Activating a Specific Row in a Specific Bank CLK CKE HIGH CS# RAS# CAS# WE# ROW ADDRESS BANK ADDRESS t t RCD (MIN)/ CK < READ or NOP WRITE DON’T CARE Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM ©2003, Micron Technology, Inc. ...
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... READ NOP NOP OUT t AC CAS Latency = READ NOP NOP CAS Latency = 3 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc NOP OUT DON’T CARE UNDEFINED ...
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... READ NOP NOP cycles BANK, COL OUT OUT OUT TRANSITIONING DATA DON’T CARE Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T7 NOP D OUT b ©2003, Micron Technology, Inc. ...
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... CAS Latency = 3 TRANSITIONING DATA 17 64Mb: x4, x8, x16 SDRAM T4 T5 NOP NOP D D OUT OUT NOP NOP NOP OUT OUT OUT DON’T CARE Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. ...
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... OUT TRANSITIONING DATA A CAS latency of three is used for illustration. The READ command may be to any bank, and the WRITE command may be to any bank. Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. T5 WRITE BANK, ...
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... ROW D D OUT OUT NOP NOP ACTIVE cycles BANK a, ROW OUT OUT OUT DON’T CARE Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. SDRAM ...
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... cycle D D OUT OUT BURST NOP NOP NOP TERMINATE cycles OUT OUT OUT DON’T CARE Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM ©2003, Micron Technology, Inc. ...
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... TRANSITIONING DATA DON’T CARE NOTE: DQM is LOW. Each WRITE command may be to any bank. Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T3 NOP T2 WRITE BANK, COL ©2003, Micron Technology, Inc. ...
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... NOP NOP PRECHARGE BANK BANK all) COL TRANSITIONING DATA Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM met NOP ACTIVE NOP BANK a, ROW t RP NOP NOP ACTIVE BANK a, ROW DON’ ...
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... SDRAM t CKS). See Figure 21. Figure 21 Power-Down ( ( ) ) ( ( ) ) > t CKS t CKS ( ( ) ) ( ( ) ) NOP NOP ( ( ) ) Input buffers gated off Exit power-down mode. Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. t RP) af- ACTIVE t RCD t RAS t RC DON’T CARE ...
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... BANK, COL OUT OUT TRANSITIONING DATA NOTE: For this example, CAS latency = 2, burst length = 4 or greater, and DQM is LOW. Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T5 T6 NOP NOP D D OUT OUT DON’ ...
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... WR - BANK BANK n WRITE with Burst of 4 Write-Back BANK m, COL TRANSITIONING DATA DON’T CARE -d at T4. IN Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM ©2003, Micron Technology, Inc. ...
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... WR - BANK m WRITE with Burst of 4 Write-Back BANK m, COL TRANSITIONING DATA DON’T CARE Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM t WR begins when ©2003, Micron Technology, Inc. ...
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... AUTO REFRESH VALID See Truth Table 3 was the state of CKE at the previous clock edge. n result of COMMAND n t XSR period. Micron Technology, Inc., reserves the right to change products or specifications without notice. 27 64Mb: x4, x8, x16 SDRAM ACTION NOTES n Maintain Power-Down Maintain Self Refresh ...
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... XSR has been t RP has been met. t RCD has been met. No data bursts/accesses and met. Once t RCD is met. Once Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM NOTES ...
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... MRD is met, the SDRAM will be in the all banks idle state. is met, all banks will be in the idle state. 29 64Mb: x4, x8, x16 SDRAM met. Once met. Once Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc MRD has t RP ...
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... RP is met, the bank will be in the idle state. (Continued on next page) 30 64Mb: x4, x8, x16 t XSR has been met (if the t RP has been met. t RCD has been met. No data bursts/accesses and Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM NOTES ...
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... WRITE to bank m is registered. The last valid WRITE to bank n will be data registered one clock prior to the WRITE to bank m (Figure 27). 64Mb: x4, x8, x16 SDRAM 64MSDRAM_F.p65 – Rev. F; Pub. 1/ begins when the READ to bank m is registered. The last valid WRITE to bank n Micron Technology, Inc., reserves the right to change products or specifications without notice. 31 64Mb: x4, x8, x16 SDRAM t t ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc µA µ 18, 19 12, 19 18, 19 12, 18, 19, 32 ...
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... CLK + 1 CLK + 7.5ns 7ns Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM ...
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... DPL 2 t BDL 1 t CDL 1 t RDL 2 t MRD ROH( ROH(2) 2 Micron Technology, Inc., reserves the right to change products or specifications without notice. 34 64Mb: x4, x8, x16 SDRAM -7E -75 -8E UNITS NOTES ...
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... CK = 10ns; for -75 and 7.5ns; for -7E and CK = 7.5ns; for - 6ns. RFC (MIN) else CKE is LOW. The I Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM t RP; clock(s) CK=7.5ns for -75 undershoot limit is actu- DD © ...
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... MIN MAX MIN MAX MIN MAX MIN MAX UNITS 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1 Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM ACTIVE ROW ROW BANK DON’T CARE - ...
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... MIN MAX MIN MAX MIN MAX MIN MAX UNITS – 7 0.8 0.8 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1.5 Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM ACTIVE ROW ROW BANK DON’T CARE - ©2003, Micron Technology, Inc. ...
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... MIN MAX MIN MAX MIN MAX MIN MAX UNITS 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1.5 5.5 5.4 5.4 – 5 Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T9 NOP DON’T CARE UNDEFINED - ...
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... MIN MAX MIN MAX MIN MAX MIN MAX UNITS CKH CKS 1 CMH CMS 1 RFC Micron Technology, Inc., reserves the right to change products or specifications without notice. 39 64Mb: x4, x8, x16 SDRAM AUTO NOP NOP ACTIVE ( ( REFRESH ) ...
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... Exit self refresh mode (Restart refresh time base) -6 -7E -75 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1.5 42 120,000 37 120,000 44 120,000 Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM AUTO DON’T CARE - 120,000 ©2003, Micron Technology, Inc. ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. SDRAM T8 ACTIVE ROW ROW BANK DON’T CARE UNDEFINED - ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. SDRAM T8 ACTIVE ROW ROW BANK DON’T CARE UNDEFINED - ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T8 NOP DON’T CARE UNDEFINED - 120,000 ©2003, Micron Technology, Inc. ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. T8 NOP DON’T CARE UNDEFINED - ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. SDRAM T8 ACTIVE ROW ROW BANK OUT t RCD - BANK 0 DON’T CARE UNDEFINED -8E 1 ...
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... MIN MAX MIN MAX MIN MAX MIN MAX UNITS 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1.5 5.5 5.4 5.4 – 5 Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM NOP NOP m+1 OUT t HZ DON’T CARE UNDEFINED - ...
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... MIN MAX MIN MAX MIN MAX MIN MAX UNITS 1.5 1.5 1 0.8 0.8 1 1.5 1.5 1.5 2 5.5 5.4 5.4 – 5 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. T8 NOP DON’T CARE UNDEFINED ...
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... Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T8 ACTIVE ROW ROW BANK DON’T CARE - 120,000 ©2003, Micron Technology, Inc. ...
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... CLK 1 CLK 1 CLK + 6ns + 7ns + 7.5ns Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T9 ACTIVE ROW ROW BANK DON’T CARE - 120,000 ...
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... RP -6 -7E -75 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1.5 42 120,000 37 120,000 44 120,000 Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T8 NOP DON’T CARE - 120,000 ©2003, Micron Technology, Inc. ...
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... CLK 1 CLK 1 CLK 1 CLK + 6ns + 7ns + 7.5ns + 7ns Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc. T9 NOP - 120,000 – ...
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... CLK 1 CLK 1 CLK + 6ns + 7ns + 7.5ns Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T9 ACTIVE ROW ROW BANK RCD - BANK BANK 1 DON’T CARE -8E 1 ...
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... Full page completed -6 -7E -75 -8E MIN MAX MIN MAX MIN MAX MIN MAX UNITS 1.5 1.5 1 0.8 0.8 1 1.5 1.5 1 0.8 0.8 1 1.5 1.5 1 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2003, Micron Technology, Inc NOP 2, 3 DON’T CARE ...
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... -7E -75 MIN MAX MIN MAX MIN MAX MIN MAX UNITS 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1.5 1 0.8 0.8 1.5 1.5 1 Micron Technology, Inc., reserves the right to change products or specifications without notice. SDRAM T7 NOP DON’T CARE - ©2003, Micron Technology, Inc. ...
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... Package width and length do not include mold protrusion; allowable mold protrusion is 0.25mm per side. 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron, the M logo, and the Micron logo are trademarks and/or service marks of Micron Technology, Inc. 64Mb: x4, x8, x16 SDRAM 64MSDRAM_F.p65 – Rev. F; Pub. 1/03 54-PIN PLASTIC TSOP (400 mil) ...