DS80C310-ECL Dallas Semiconducotr, DS80C310-ECL Datasheet - Page 8

• Manufacturer Part Number: DS80C310-ECL
• Description: High-Speed Micro
• Manufacturer: Dallas Semiconducotr

MEMORY ACCESS
The DS80C310 contains no on-chip ROM, and 256 bytes of scratchpad RAM. Off-chip memory is
accessed using the multiplexed address/data bus on P0 and the MSB address on P2. Timing diagrams are
provided in the Electrical Specifications. Program memory (ROM) is accessed at a fixed rate determined
by the crystal frequency and the actual instructions. As mentioned above, an instruction cycle requires
four clocks. Data memory (RAM) is accessed according to a variable speed MOVX instruction as
described below.
STRETCH MEMORY CYCLE
The DS80C310 allows the application software to adjust the speed of data memory access. The micro is
capable of performing the MOVX in as few as two instruction cycles. However, this value can be
stretched as needed so that both fast memory and slow memory or peripherals can be accessed with no
glue logic. Even in highspeed systems, it may not be necessary or desirable to perform data memory
access at full speed. In addition, there are a variety of memory mapped peripherals such as LCD displays
or UARTs that are not fast.
The Stretch MOVX is controlled by the Clock Control Register at SFR location 8Eh as described below.
This allows the user to select a stretch value between 0 and 7. A Stretch of 0 will result in a two-machine
cycle MOVX. A Stretch of 7 will result in a MOVX of nine machine cycles. Software can dynamically
change this value depending on the particular memory or peripheral.
On reset, the Stretch value will default to a one resulting in a three-cycle MOVX. Therefore, RAM access
will not be performed at full speed. This is a convenience to existing designs that may not have fast RAM
in place. When maximum speed is desired, the software should select a Stretch value of 0. When using
very slow RAM or peripherals, a larger stretch value can be selected. Note that this affects data memory
only and the only way to slow program memory (ROM) access is to use a slower crystal.
Using a Stretch value between 1 and 7 causes the microcontroller to stretch the read/write strobe and all
related timing. This results in a wider read/write strobe allowing more time for memory/peripherals to
respond. The timing of the variable speed MOVX is shown in the Electrical Specifications. Note that full
speed access is not the reset default case. Table 3 shows the resulting strobe widths for each Stretch value.
The memory stretch is implemented using the Clock Control Special Function Register at SFR location
8Eh. The stretch value is selected using bits CKCON.2-0. In the table, these bits are referred to as M2
through M0. The first stretch (default) allows the use of common 120 ns or 150 ns RAMs without
dramatically lengthening the memory access.
DATA MEMORY CYCLE STRETCH VALUES Table 3
M2 M1 M0
CKCON.2-0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
MEMORY CYCLES
3(default)
2
4
5
6
7
8
9
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RD OR WR STROBE
WIDTH IN CLOCKS
12
16
20
24
28
2
4
8
STROBE WIDTH TIME
@ 25 MHz
1120 ns
160 ns
320 ns
480 ns
640 ns
800 ns
960 ns
80 ns
DS87C520/DS83C520
@ 33 MHz
242ns
364ns
485ns
606ns
727ns
848ns
121ns
60ns