LTC4261 LINER [Linear Technology], LTC4261 Datasheet
LTC4261
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LTC4261 Summary of contents
Page 1
... The devices feature independently adjust- able inrush current and overcurrent limits to minimize stresses on the pass transistor during start-up, input step and output short conditions. The LTC4261 defaults to latch-off while the LTC4261-2 defaults to auto-retry on overcurrent faults interface and onboard 10-bit ADC allow monitoring of board current, voltage and fault status ...
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... Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. 2 (Notes 1, 2) Operating Temperature Range LTC4261C ................................................ 0°C to 70°C LTC4261I ............................................. –40°C to 85°C Storage Temperature Range + 0.3V SSOP ................................................. –65°C to 150°C CC QFN .................................................... – ...
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... SS V Rising LTC4261C UVH LTC4261I V Falling LTC4261C UVL LTC4261I UVH and UVL Tied Together V Falling UVL V Rising LTC4261C OV LTC4261I V – V SENSE EE ON, EN, PGI, FLTIN Falling or Rising V Rising PGIO ON, EN, UVH, UVL, OV, SENSE, PGI, FLTIN = 3V LTC4261/LTC4261-2 MIN TYP MAX ● 10.65 11.2 11.8 ● 370 600 ● ...
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... LTC4261/LTC4261-2 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifi cations are at I SYMBOL PARAMETER Timer V TMR Pin High Threshold TMR(H) V TMR Pin Low Threshold TMR(L) I TMR Pin Pull-Up Current TMR(UP) I TMR Pin Pull-Down Current TMR(DN) Output Pins V PG, PGIO Pins Output Low ...
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... Driving this pin to voltages beyond the clamp may damage the part. The pin can be safely tied to higher voltages through a resistor that limits the current below 2mA. Note 5: Guaranteed by design and not subject to test. pin to a minimum of IN LTC4261/LTC4261-2 MIN TYP MAX 400 0.65 1 ...
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... LTC4261/LTC4261-2 TYPICAL PERFORMANCE CHARACTERISTICS Shunt Regulator Voltage vs Input Current 10.8 11 11.2 11.4 11.6 SHUNT REGULATOR VOLTAGE AT V (V) IN 42612 G01 GATE Output High Voltage vs Temperature 10 10.65V IN 10.4 10.3 10.2 10.1 10.0 –50 – TEMPERATURE (°C) 42612 G04 RAMP Pin Current vs Temperature –22.0 –21.5 –21.0 – ...
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... 500 LOAD CURRENT (mA) ADC INL vs Code (ADIN Pin) 1.0 0.5 0 –0.5 –1.0 100 0 256 512 768 CODE LTC4261/LTC4261 5mA 25°C, unless otherwise noted IN A Current Limit Voltage vs Temperature 52.0 51.5 51.0 50.5 50.0 49.5 49.0 –50 – 100 TEMPERATURE (°C) 42612 G11 ADC Total Unadjusted Error vs Code (ADIN Pin) 1 ...
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... FLTIN (Pin 22/NA): General Purpose Fault Input. If this pin pulls low, the FAULT register bit B7 is latched to “1.” This pin is used to sense an external fault condition and its status does not affect the FET control functions of the LTC4261. Not available on the QFN package. Connect to INTV if unused. CC GATE (Pin 15/Pin 10): N-Channel FET Gate Drive Output ...
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... V crosses undervoltage lockout (UVLO) circuit holds the GATE low SENSE until V is above 9V. Bypass this pin with a 1µF capaci- IN tor LTC4261/LTC4261-2 ) creates a voltage SS to 20µA. If the SS capacitor is absent, RAMP ) to this pin to create timing delays at start-up, TMR if unused unused ...
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... LTC4261/LTC4261-2 BLOCK DIAGRAM 11.2V UVLO INTV = 4.25V CC 10µA 50nA 3pF SSC UVL 2.291V UVH 2.56V OV 1.77V 5µA 5µA TMR 2.56V 12mA 5µA ADR0 8 A0 • • DECODER ADR1 A7 A8 ADIN ADIN2/OV MUX V SENSE – 20µ ...
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... OPERATION The LTC4261/LTC4261-2 are designed to turn a board’s supply voltage on and off in a controlled manner, allow- ing the board to be safely inserted or removed from a live – 48V backplane. The devices also feature an onboard 2 10-bit ADC and I C interface that allows monitoring board current, voltages and faults ...
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... AT 71V 100nF 1µ VCC 11.8k 0.1µF 1% –48V INPUT V EE Figure 1. –48V/200W Hot Swap Controller Using LTC4261 with Current, Input Voltage and V RTN A RTN B ENABLE A ENABLE B R10 100k 7A –48V A 7A –48V B BACKPLANE PLUG-IN CARD Figure 2a. 200W AdvancedTCA Hot Swap Controller with Input/Output Monitoring ...
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... ALERT B Figure 2b. 200W AdvancedTCA Hot Swap Controller with Input/Output Monitoring and Power Good Watchdog Using LTC4261 in I Initial Start-Up and Inrush Control Several conditions must be satisfi ed before the FET turn-on sequence is started. First the voltage at V its 9V undervoltage lockout level. Next the internal supply INTV must cross its 4 ...
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... When V is ramped down to V OUT the GATE pin and pulls the GATE illustrates the start-up sequence of the LTC4261/ LTC4261-2. During board insertion and input power step, an internal clamp turns on to hold the RAMP pin low. Capacitor C and resistor R suppress the noise at the RAMP pin ...
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... The auto-retry following the D overvoltage fault does not have a delay. The auto-retry control bits and their defaults at power up are listed in Table 6. Note that the LTC4261 defaults to latch-off while the LTC4261-2 defaults to auto-retry following the over- current fault. PWRGD2 ...
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... The condition of the GATE pin output is controlled by register bit A7, which is the AND of A4, D3 and the ab- sence of UV, OV and other faults. Overcurrent Protection and Overcurrent Fault The LTC4261/LTC4261-2 feature two levels of protec- tion from short-circuit and overcurrent conditions. Load current is monitored by the SENSE pin and resistor R ...
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... PG and PGIO pins, the TMR pin, and the SS pin are not interrupted through the input step sequence. The waveform in Figure 6 shows how the LTC4261/LTC4261-2 responds to an input step. Note that the current limit threshold should be set suffi ciently high to accommodate the sum of the load INRUSH Figure 5 ...
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... V UVL HYST For V UVL the minimum hysteresis at UVH and UVL: δV when R H(MAX) The design of the LTC4261/LTC4261-2 protects the UV comparator from chattering even when H(MAX) An undervoltage fault occurs when the UVL pin falls be- = 0.269V low 2.291V and the UVH pin falls below 2.56V – δV ...
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... LTC4261/LTC4261-2 will respond with its address on the SDA line and release ALERT as shown in Figure 14. If there is a collision between two LTC4261’s responding with their addresses simultaneously, then the device with LTC4261/LTC4261-2 and the PGI pin is ...
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... I C monitoring of connection sense or other important signals. On/off control is possible with or without I tion. Further, the LTC4261/LTC4261-2 may reside on either the removable board or on the backplane. Even when operating autonomously, the I ercise control over the GATE output, although depending on how they are connected, EN and ON could subse- ...
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... Short Pin to RTN. Figure 8d uses the UV divider string to detect board insertion. This method works equally well in both backplane and board resident applications. AdvancedTCA Style Control. Figure 2 shows an ATCA application using EN as the interface to the LTC4261. 2 Register bit A4 allows the I C port to monitor the status of EN and by setting C4 high, bit B4 can generate an alert to instantly report any changes in the state of EN ...
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... LTC4261/LTC4261-2 APPLICATIONS INFORMATION Confi guring the PGIO Pin Table 6 describes the possible states of the PGIO pin us- ing the CONTROL register bits D6 and D7. At power-up the default state is for the PGIO pin to pull low when the second power good signal is ready. Other uses for ...
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... R/W ACK DATA ACK 2 Figure 9. Data Transfer over SMBus DATA ADDRESS b7: a3:a0 Figure 11. LTC4261 Serial Bus SDA Write Word Protocol S ADDRESS a3:a0 42612 F10 Figure 12. LTC4261 Serial Bus SDA Read Byte Protocol W A COMMAND A S ADDRESS b3:b0 ...
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... Alert Response Protocol The LTC4261/LTC4261-2 implement the SMBus Alert Response Protocol as shown in Figure 14. If enabled through the ALERT register C, the LTC4261/ LTC4261-2 will respond to faults by pulling the ALERT pin low. Multiple LTC4261/LTC4261-2s can share a com- mon ALERT line and the protocol allows a master to de- termine which LTC4261/LTC4261-2s are pulling the line low ...
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... Figure 14. LTC4261 Serial Bus SDA Alert Response Protocol Figure 14. LTC4261 Serial Bus SDA Alert Response Protocol the R/W bit set to one. Any LTC4261/LTC4261-2 that is pulling its ALERT pin low will acknowledge and begin sending back its individual slave address. An arbitration scheme ensures that the LTC4261/ LTC4261-2 with the lowest address will have priority ...
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... Abort the read if it takes more than double the typical time (1.2ms) for all 18 bits to be clocked out. A typical application circuit with the LTC4261/LTC4261-2 in the broadcast mode is illustrated in Figure 17, where input voltage the FET and V ...
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... H = Tie to INV ; L = Tie connect, open Don’t care CC EE Table 2. LTC4261 Register Address and Contents REGISTER REGISTER READ/WRITE ADDRESS* NAME 00h STATUS (A) 01h FAULT (B) 02h ALERT (C) 03h CONTROL (D) 04h SENSE (E) 05h SENSE (F) ...
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... LTC4261/LTC4261-2 APPLICATIONS INFORMATION Table 3. STATUS Register A (00h)—Read Only BIT NAME OPERATION A7 FET On Indicates State of FET FET On FET Off A6 PGIO Input Indicates State of the PGIO Pin when Confi gured to General Purpose Input PGIO High PGIO Low A5 FET Short Indicates Potential FET Short if Current Sense Voltage Exceeds 2mV While FET is Off FET is Shorted FET is Not Shorted ...
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... D3 FET On Control Turns FET On and Off Turn FET On Turn FET Off. Defaults to ON Pin State at End of Start-Up Debounce Delay D2 Overcurrent Enables Auto-Retry After an Overcurrent Fault Retry Enabled (Default, LTC4261-2), Auto-Retry 0 = Retry Disabled (Default, LTC4261) D1 Undervoltage Enables Auto-Retry After an Undervoltage Fault Retry Enabled (Default Retry Disabled ...
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... LTC4261/LTC4261-2 PACKAGE DESCRIPTION .254 MIN .0165 ± .0015 RECOMMENDED SOLDER PAD LAYOUT .0075 – .0098 (0.19 – 0.25) .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" ...
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... UFD Package 24-Lead Plastic QFN (4mm × 5mm) (Reference LTC DWG # 05-08-1696 Rev A) 0.70 ±0.05 3.65 ± 0.05 PACKAGE OUTLINE 3.00 REF 4.10 ± 0.05 5.50 ± 0.05 0.75 ± 0.05 4.00 ± 0.10 (2 SIDES) 0.200 REF 0.00 – 0.05 LTC4261/LTC4261 0.05 TYP PIN 1 NOTCH 2.00 REF 0.115 TYP 23 24 0.40 ± 0. 3.00 REF 3.65 ± 0.10 2.65 ± 0.10 (UFD24) QFN 0506 REV A 0.25 ± ...
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... F C 0.1 –48V INPUT V EE Figure 17. Application Circuit of the LTC4261 in Single-Wire Broadcast Mode Figure 18. Using the LTC4261 and a Thermistor to Monitor Temperature RELATED PARTS PART NUMBER DESCRIPTION LT1640AH/LT1640AL Negative High Voltage Hot Swap Controllers in SO-8 Negative High Voltage Supplies from –10V to –80V LTC1921 Dual – ...