CY7C1021D CYPRESS [Cypress Semiconductor], CY7C1021D Datasheet

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CY7C1021D

Manufacturer Part Number
CY7C1021D
Description
1-Mbit (64K x 16) Static RAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet

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Cypress Semiconductor Corporation
Document #: 38-05462 Rev. *E
Features
Logic Block Diagram
Note
1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.
• Pin-and function-compatible with CY7C1021B
• High speed
• Low active power
• Low CMOS Standby Power
• 2.0V Data Retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Independent control of upper and lower bits
• Available in Pb-free 44-pin 400-Mil wide Molded SOJ and
— t
— I
— I
44-pin TSOP II packages
AA
CC
SB2
= 10 ns
= 80 mA @ 10 ns
= 3 mA
A
A
A
A
A
A
A
A
2
1
0
7
6
5
4
3
DATA IN DRIVERS
COLUMN DECODER
RAM Array
64K x 16
198 Champion Court
Functional Description
The CY7C1021D is a high-performance CMOS static RAM
organized as 65,536 words by 16 bits. This device has an
automatic power-down feature that significantly reduces
power consumption when deselected. The input/output pins
(IO
Write to the device by taking Chip Enable (CE) and Write
Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW,
then data from IO pins (IO
location specified on the address pins (A
High Enable (BHE) is LOW, then data from IO pins (IO
through IO
address pins (A
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH.
If Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on IO
If Byte High Enable (BHE) is LOW, then data from memory
appears on IO
complete description of read and write modes.
• Deselected (CE HIGH)
• Outputs are disabled (OE HIGH)
• BHE and BLE are disabled (BHE, BLE HIGH)
• When the write operation is active (CE LOW, and WE LOW)
0
1-Mbit (64K x 16) Static RAM
through IO
San Jose
15
) is written into the location specified on the
8
15
0
to IO
) are placed in a high-impedance state when:
through A
,
15
CA 95134-1709
. See the
15
0
IO
IO
).
through IO
0
8
[1]
–IO
–IO
BHE
WE
CE
OE
BLE
“Truth Table” on page 8
Revised February 22, 2007
7
15
0
7
), is written into the
through A
CY7C1021D
408-943-2600
15
). If Byte
0
to IO
for a
7
8
.
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CY7C1021D Summary of contents

Page 1

... Cypress Semiconductor Corporation Document #: 38-05462 Rev. *E 1-Mbit (64K x 16) Static RAM Functional Description The CY7C1021D is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. The input/output pins ...

Page 2

... –10 (Industrial) –12 (Automotive CY7C1021D [3] Unit 12 ns 120 Page [+] Feedback [+] Feedback ...

Page 3

... CE > > < max Max > V – 0.3V > V – 0.3V < 0.3V CY7C1021D Ambient V Speed CC Temperature 5V ± 10% –40°C to +85° –12 (Automotive) Unit Max Min Max 2.4 0.4 0 0. 0.8 –0.5 ...

Page 4

... Still Air, soldered × 4.5 inch, four-layer printed circuit board [6] 3.0V 30 pF* GND ≤ Rise Time: High-Z characteristics: R1 480Ω 5V OUTPUT 255Ω INCLUDING JIG AND SCOPE (c) CY7C1021D Max Unit SOJ TSOP II Unit °C/W 59.52 53.91 °C/W 36.75 21.24 ALL INPUT PULSES 90% 90% ...

Page 5

... CC is less than less than t , and t HZCE LZCE HZOE LZOE HZWE “AC Test Loads and Waveforms [6]” on page CY7C1021D –12 (Automotive) Unit Min Max µs 100 ...

Page 6

... DATA RETENTION MODE 4.5V > CDR [14, 15 OHA t RC DATA VALID 50% > 50 µs or stable at V > 50 µ CC(min) CC(min CY7C1021D Min Max Unit 2.0 V – 0.3 V, Industrial 3 mA Automotive 4. DATA VALID t HZOE t HZCE t HZBE HIGH ...

Page 7

... Data IO is high impedance BHE and/or BLE = V 18 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05462 Rev SCE PWE PWE t SCE CY7C1021D Page [+] Feedback [+] Feedback ...

Page 8

... Write – Upper bits only High Z Selected, Outputs Disabled High Z Selected, Outputs Disabled Package Package Type Diagram 51-85082 44-pin (400-Mil) Molded SOJ (Pb-free) 51-85087 44-pin TSOP Type II (Pb-free) 51-85087 44-pin TSOP Type II (Pb-free) CY7C1021D LZWE Mode Power Standby ( Active (I ) ...

Page 9

... Package Diagrams Figure 1. 44-pin (400-Mil) Molded SOJ, 51-85082 Document #: 38-05462 Rev. *E CY7C1021D 51-85082-*B Page [+] Feedback [+] Feedback ...

Page 10

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C1021D 51-85087-*A ...

Page 11

... Document History Page Document Title: CY7C1021D, 1-Mbit (64K x 16) Static RAM Document Number: 38-05462 Orig. of REV. ECN NO. Issue Date Change ** 201560 See ECN *A 233695 See ECN *B 263769 See ECN *C 307601 See ECN *D 520647 See ECN *E 802877 See ECN Document #: 38-05462 Rev. *E ...

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