TUA6041 INFINEON [Infineon Technologies AG], TUA6041 Datasheet
TUA6041
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TUA 6041-2 Low - gita ...
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Edition 2006-12-19 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2006. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). ...
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TUA 6041-2 Low - gita ...
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TUA 6041-2 ’LIGHTNING’ Revision History: Previous Version: Page Subjects (major changes since last revision 11, 28, L-Band application added. Operating range and AC/DC Characteristics extended for L-Band Table Footnote added with description ...
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Table of Contents List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Tables Table 1 ATSC tuners . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Figures Figure 1 Pin Configuration TUA 6041-2 in VQFN-48 Package . . . . . . . . . . . . . 13 Figure 2 Functional Block Diagram TUA 6041-2 in VQFN-48 package . . . . ...
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Product Info General Description The TUA 6041-2 integrates the mixer-oscillator, AGC amplifier, digitally programmable phase lock loop (PLL) and a digital alignment feature so that traditional air coils can be replaced by SMD coils. This makes the TUA 6041-2 ...
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Product Description The TUA 6041-2 integrates the mixer-oscillator, variable AGC output amplifier, digitally programmable phase lock loop (PLL) not requiring an external high voltage buffer and a digital alignment feature. Furthermore, the TUA 6041-2 integrates a buffered RF AGC, ...
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SAW Filter Driver • Symmetrical IF preamplifier with low output impedance able to drive a compensated SAW filter (500 //40 pF). 2.1.4 IF AGC Amplifier • Symmetrical variable gain IF output amplifier with low noise, high linearity, high dynamic ...
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Recommended band limits in MHz Table 1 ATSC tuners Band min. LOW 55.25 MID 163.25 HIGH 457.25 Table 2 DVB-T and analog tuners Band min. LOW 48.25 MID 161.25 HIGH 447.25 Table 3 ISDB-T tuners Band min. LOW 93 ...
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Functional Description 3.1 Pin Configuration OSCLOWOUT 1 OSCGND 2 OSCMIDIN 3 OSCMIDOUT 4 OSCHIGHIN 5 6 OSCHIGHOUT 7 OSCHIGHOUT OSCHIGHIN 8 9 VCC SAWOUT 10 SAWOUT 11 12 GND Figure 1 Pin Configuration TUA 6041-2 in VQFN-48 Package Data ...
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Pin Definition and Functions • Pin Definition and Functions Pin Symbol No. 48 OSCLOWIN 1 OSCLOWOUT 48 2 OSCGND Oscillator ground 3 OSCMIDIN 4 OSCMIDOUT 3 Data Sheet Equivalent I/O Schematic 14 TUA 6041-2 LIGHTNING Functional Description Average DC ...
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Pin Symbol No. 5 OSCHIGHIN 6 OSCHIGOUT 7 OSCHIGOUT 6 8 OSCHIGHIN 5 9 VCC Supply voltage 10 SAWOUT 11 SAWOUT 12 GND 13 IFIN 14 IFIN 13 Data Sheet Equivalent I/O Schematic 10 TUA 6041-2 LIGHTNING Functional ...
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Pin Symbol No. 15 IFAMPAGC 16 IFOUT 17 IFOUT VDD Supply voltage 21 DC/DC_GND 22 DC/DC Clock Data Sheet Equivalent I/O Schematic TUA 6041-2 LIGHTNING Functional Description Average DC ...
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Pin Symbol No. 23 XTAL Buffer 24 XTAL Out 25 XTAL In 26 Busmode 27 CAS/EN 27 Data Sheet Equivalent I/O Schematic ref 17 TUA 6041-2 LIGHTNING Functional Description Average DC voltage ...
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Pin Symbol No. 28 SCL 29 SDA 30 RFAGC Buffer 31 RFAGC Data Sheet Equivalent I/O Schematic disable 32 TUA 6041-2 LIGHTNING Functional Description Average DC voltage ...
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Pin Symbol No. 34 P2, VRF 35 SAWIN 36 SAWIN 37 MIXOUT 38 MIXOUT Data Sheet Equivalent I/O Schematic Oscillator 19 TUA 6041-2 LIGHTNING Functional Description Average DC voltage 3.3V CC LOW MID HIGH ...
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Pin Symbol No. 39 DAC3 40 DAC2 41 DAC1 42 RFGND IF ground 43 LOWIN 44 MIDIN 45 MIDIN 46 HIGHIN 47 HIGHIN 49 GND package Exposed pad ground (Die pad) Data Sheet Equivalent I/O Schematic + 39, 40, 41 ...
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Functional Block Diagram OSCLOWOUT Oscillator LOW 2 OSCGND Oscillator 3 MID 4 Oscillator HIGH Prog. Divider Divider AGC Amplifier Functional ...
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Circuit Description 3.4.1 Mixer-Oscillator-block, SAW filter driver The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced high-impedance input and two mixers with a balanced low-impedance input), two 2-pin asymmetrical oscillators for the LOW and the MID ...
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PLL block, XTAL oscillator The VCO frequency f OSC Frequency Synthesizer). The oscillator signal is internally DC-coupled as a differential signal to the programmable divider input. The signal subsequently passes through a programmable divider (N) and then the divided ...
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In I C-bus mode four different chip addresses can be set by appropriate DC levels at pin CAS (Chip Address Select), while in 3-Wire mode the chip is addressed by a low active enable signal at pin EN. The ...
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A. After power-on reset only bus interface and XTAL-oscillator with bandgap are active and the current consumption is about 2.6 mA (typ.). 3.4.9 IF switch, Loop thru For the alignment procedure of the tuner ...
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Applications 4.1 Tuner application block diagram Figure 4 Tuner application block diagram Data Sheet 26 Revision 3.1, 2006-12-19 TUA 6041-2 LIGHTNING Applications ...
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Application circuit for L1 8,5 turns R1 12R GND C10 100p D1 BB659C R2 2k7 D2 BB659C R3 2k7 C11 L2 2,5 turns R4 8R2 82p GND C15 R5 2k2 C12 22p GND 22n C14 3n3 ...
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Application circuit for L1 8,5 turns R1 12R GND C10 100p D1 BB659C R2 2k7 D2 BB659C R3 2k7 C11 L2 2,5 turns R4 8R2 82p GND C15 R5 2k2 C12 1p8 GND 22n C14 3n3 ...
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Reference 5.1 Electrical Data 5.1.1 Absolute Maximum Ratings Attention: The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC will result. Table 4 Absolute Maximum Ratings # Parameter ...
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Parameter 16. DC/DC output current 17. DAC output current Mixer-Oscillator 18. Mix inputs LOW band 19. Mix inputs MID/HIGH band 20. 21. VCO base voltage 22. VCO collector voltage 23. Voltage on all other inputs, outputs, except GNDs ESD-Protection ...
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Parameter 5. MID band mixer input frequency range 6. HIGH band mixer input frequency range 7. LOW oscillator frequency range 8. MID band oscillator frequency range 9. HIGH band oscillator frequency range 5.1.3 AC/DC Characteristics Table 6 AC/DC Characteristics, ...
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Parameter 16. Current consumption in stand-by mode 17. 18. Digital Part PLL Crystal oscillator connections XTAL 19. Crystal frequency 20. Crystal resistance R 21. 22. Crystal oscillator transconductance 23. Oscillator impedance 24. 25. Buffer output frequency 26. XTAL ...
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Parameter Ports 33. Standard Ports (PMOS) 34. Output saturation voltage 35. Voltage referred port 36. Voltage referred port DC/DC clock generator 37. Programmable high 38. Programmable low T 39. Output high current I 40. Output low impedance DA ...
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Parameter 48. Voltage gain 49. Noise figure 50. SAWOUT output voltage causing 0.8% of crossmodulation in channel 51. Input IP3 52. 53. SAWOUT output voltage causing 1 dB compression 54. Local oscillator FM 2 caused ...
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Parameter 60. Noise figure (not corrected for image) 61. SAWOUT output voltage causing 0.8% of crossmodulation in channel 62. Input IP3 63. 64. SAWOUT output voltage causing 1 dB compression 65. Local oscillator FM 2 caused by I ...
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Parameter 72. SAWOUT output voltage causing 0.8% of crossmodulation in channel 73. Input IP3 74. 75. SAWOUT output voltage causing 1 dB compression 76. Local oscillator FM 2 caused communication 77. (N+ MHz ...
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Parameter 84. Phase noise, carrier to noise sideband 85. 86. 87. Ripple susceptibility 88. MID band oscillator 89. Oscillator frequency 90. Phase noise, carrier to noise sideband 91. 92. 93. Ripple susceptibility ...
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Parameter HIGH band oscillator 95. Oscillator frequency 96. Phase noise, carrier to noise sideband 97. 98. 99. Ripple susceptibility 100. HIGH band oscillator in L-Band application (see 4.3 on page 28) 101. Oscillator frequency 102. ...
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Parameter 108. Level of divider interferences in the IF signal 109. Crystal oscillator interferences rejection 110. Reference frequency rejection 111. Channel S02 beat INT RF AGC output 112. RF AGC take-over point wide band (RF input) 113. RF ...
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Parameter 124. Saturation voltage high 125. 126. RF AGC Buffer output voltage IF amplifier 127. Voltage gain 128. 129. Maximum IF input level 130. Minimum IF input level 131. Input impedance 132. 133. Low end cutoff frequency (-1 ...
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Parameter 136. Intermodulation V1, (1.1mA) C/IM3 137. Third order output intercept point V1, (5.0mA) 138. Signal to noise ratio SNR 139. Noise figure 140. Output impedance R 141. 1) Values are referred to Figure ...
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The supply ripple susceptibility is a sideband measurement using a spectrum analyzer connected to the IF output. An unmodulated RF signal with a level of 80 dBµV is applied to the test board RF input. A sinewave signal with ...
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Table 9 Address selection in I Voltage at pin CAS/ 0. VCCD open circuit or (0 (0 VCCD (0 VCCD Table 10 Sub Addresses ...
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Bus Data Format Table 12 Bus Data Format C-bus Write Mode I C-bus Read Mode 3W-bus Write Mode 3W-bus Read Mode Bit Function Bit STA STA 1 MSB chip address 0 ...
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I C-bus Write Mode I C-bus Read Mode 3W-bus Write Mode 3W-bus Read Mode Bit Function Bit ... data in X... (X=7, 23) D2 MA0 D1 MA1 D0 LSB ...
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Bus Timing BUSMODE = 0 t BUF SDA t LOW SCL HD.STA 2 Figure Bus BUSMODE = 1 DATA t t LOW R CLOCK t t HD.STA WHEN ENABLE S t SU.SCLENA Figure ...
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Table 13 Bus Timing # Parameter 1. LOW level input voltage (SDA, SCL, CAS/EN, BUSMODE) 2. HIGH level input voltage (SDA, SCL, CAS/EN, BUSMODE) 3. Hysteresis of Schmitt trigger inputs 4. Pulse width of spikes which must be suppressed by ...
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Parameter 17. Setup time CAS/EN to SDA 18. Setup time SCL to CAS/EN 19. H-pulse width (CAS/EN) for new data 3) protocol 20. Capacitive load for each bus line capacitance of one bus line in pF. ...
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Data Byte Specification, Function and Defaults 5.5.1 Write Data Registers Table 14 Subaddress 00H, Main Divider Bit Symbol Bits 15 N15 14 N14 13 N13 12 N12 11 N11 10 N10 ...
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Table 15 Subaddress 01H, Control Bytes Bit Symbol Bits 15 P2_4 ... P2_0 14 P2_4 00000 13 P2_3 11011 12 P2_2 111X1 11 P2_1 11110 10 P2_0 11100 BS1 BS1 BS0 ...
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Table 16 Subaddress 02H, Reference Divider R and Crystal Oscillator Control Bit Symbol Bits 15 14 RFAGC B_OFF 13 XTAL3 XTA XTA XTAL2 XTAL1 XTA XTA L1 L0 ...
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Bit Symbol Bits Data Sheet V Function Description 9 2 Synthesizer Synthesizer R-counter R-counter 8 2 programmable 7 2 divider ...
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Table 17 Subaddress 03H, AGC Control and IF Signal Processing Control Bit Symbol Bits ...
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Bit Symbol Bits 5 AL0 NBE WBE WB2 WB1 WB0 0 ...
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Table 18 Subaddress 04H, DC-DC Converter Bit Symbol Bits DCh_6 13 DCh_5 12 DCh_4 11 DCh_3 10 DCh_2 9 DCh_1 8 DCh_0 DCl_6 5 DCl_5 4 DCl_4 3 DCl_3 2 DCl_2 1 DCl_1 0 ...
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Table 19 Subaddress 05H, DACs Bit Symbol Bits 23 DAC3_7 22 DAC3_6 21 DAC3_5 20 DAC3_4 19 DAC3_3 18 DAC3_2 17 DAC3_1 16 DAC3_0 15 DAC2_7 14 DAC2_6 13 DAC2_5 12 DAC2_4 11 DAC2_3 10 DAC2_2 9 DAC2_1 8 DAC2_0 ...
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Table 20 Subaddress 06H, Mode Bytes, Test Mode and Standby Control Bit Symbol Bits 15 CPT CPP PTSEL STBY11 1 10 STBY10 1 9 STBY9 1 8 ...
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Bit Symbol Bits 1 STBY1 1 0 STBY0 1 1) P0, P1 are outputs for ref div output for divided output for ref 5.5.2 Read Data Registers Table 21 Subaddress ...
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Table 22 Subaddress 8EH, Chip Code “6041” Bit Symbol Bits 15 CC15 14 CC14 13 CC13 12 CC12 11 CC11 10 CC10 9 CC9 8 CC8 7 CC7 6 CC6 5 CC5 4 CC4 3 CC3 2 CC2 1 CC1 ...
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Table 23 Subaddress 8FH, Revision Code, advanced with design steps Bit Symbol Bits 15 RC15 14 RC14 13 RC13 12 RC12 11 RC11 10 RC10 9 RC9 8 RC8 7 RC7 6 RC6 5 RC5 4 RC4 3 RC3 2 ...
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Measurement Circuits 5.6.1 Gain (G ) measurement in LOW band meas 50 V RMS Voltmeter Figure 9 Gain (G ) measurement in LOW band V • Z >> 50 => ...
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Matching circuit for optimum noise figure in LOW band 22p In 22p For MHz RF loss = 0 dB image suppression = 16 dB Figure 11 Matching circuit for optimum noise figure in LOW band 5.6.4 ...
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Noise figure (NF) measurement in MID and HIGH bands Noise Source Balun loss of balun = NFmeas - loss of balun (dB) Figure 13 Noise figure (NF) measurement in MID and HIGH bands 5.6.6 Cross ...
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Cross modulation measurement in MID and HIGH bands unwanted signal source AM = 80%, 1 kHz Hybrid wanted signal 50 source Figure 15 Cross modulation measurement in MID and HIGH bands • V’ ...
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Package PG-VQFN-48 Figure 17 PG-VQFN-48 Vignette Figure 18 PG-VQFN-48 Outline Drawing You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”: http://www.infineon.com/products. SMD = Surface Mounted Device Data Sheet Package PG-VQFN-48 ...
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Published by Infineon Technologies AG ...