AD9200LQFP-EVAL AD [Analog Devices], AD9200LQFP-EVAL Datasheet - Page 18

• Manufacturer Part Number: AD9200LQFP-EVAL
• Description: Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter
• Manufacturer: AD [Analog Devices]

THREE-STATE
AD9200
REFSENSE
+3–5A
CLAMPIN
DUTCLK
CLAMP
AVDD
REFBF
REFBS
REFTS
REFTF
MODE
STBY
VREF
J7
AD1580
5.49k
AIN
R7
10/10V
D1
C16
0.1 F
GND
C33
R53
49.9
+
TP14
15
16
17
18
19
20
21
22
23
24
25
26
27
C17
10/10V
CLK
THREE-STATE
STBY
REFSENSE
CLAMP
CLAMPIN
REFTS
REFTF
MODE
REFBF
REFBS
VREF
AIN
AVDD
10k
AVSS
XXXX
ADJ.
R8
AD9200
28
1
JP17
JP18
JP5
U1
CW
R9
1.5k
DRVDD
DRVSS
2
OTR
14
5k
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
R10
10k
XXXX
R37
1k
R38
1k
R39
1k
ADJ.
R14
13
C18
10/10V
3
4
5
6
7
8
9
10
11
12
WHITE
C8
10/10V
C19
0.1 F
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
3
2
TP19
CW
OTR
15k
R11
AD822
10k
DRVDD
R12
U2
+3–5A
TP11
DRVDD
8
4
DRVDD
Figure 39a. Evaluation Board Schematic
C9
10/10V
0.1 F
C7
DRVDD
2
3
CLK
1
0.1 F
AD822
GND
C40
U3
+3–5A
11k
R13
C41
0.1 F
B
GND
B
4
8
3
3
A
1
1
0.1 F
C10
A
1
S3 2
S4
GND
D5
D6
D7
D8
D9
D0
D1
D2
D3
D4
2
GND
16
15
21
20
19
18
17
14
24
23
22
13
19
20
21
18
17
16
15
14
24
23
22
13
5
6
74LVXC4245WM
74LVXC4245WM
B
B
B
B
B
B
B
B
VCCB VCCA
NC1
OE
GD1 U4 GD3
B
B
B
B
B
B
B
B
VCCB VCCA
NC1
OE
GD1 U5 GD3
AD822
–18–
6
5
U2
AD822
U4
U4
U4
U4
U4
U4
U4
U4
U5
U5
U5
U5
U5
U5
U5
U5
U3
GND
GD2
GD2
T/R
T/R
7
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
3
7
8
9
3
4
5
6
7
10
1
2
11
12
5
4
3
6
7
8
9
10
1
2
11
12
+3–5A
JP20
2
0.1 F
R15
1k
C11
0.1 F
1k
R16
C29
GND
1
GND
3
C20
0.1 F
C21
0.1 F
CM
2
R17
316
R18
316k
+3–5D
GND
JP21
1
C43
0.1 F
+3–5D
GND
R19
178
R20
178
B
C42
0.1 F
Q2
2N3904
Q1
2N3906
+3–5D
1
3
A
S2
0.626V TO 4.8V
2
C12
0.1 F
C14
0.1 F
4
2
7
5
2
6
RN1
22
RN1
22
RN2
22
RN2
22
RN2
22
RN1
22
12
15
13
10
11
15
1
4
3
6
1
5
RN1
22
RN1
22
RN2
22
RN1
22
RN2
22
RN2
22
C15
10/10V
C13
10/10V
CLK
11
13
16
12
16
14
TP16
WHITE
CLK_OUT
TP17
13
11
33
21
19
17
15
23
9
7
5
1
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
EXTT
EXTB
CLAMP
THREE-STATE
STBY
NC
NC
NC
REV. E
27
25
10
12
14
16
18
20
22
24
26
39
28
29
30
31
32
34
35
36
37
38
40
3
2
4
6
8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8