AD5780ACPZ AD [Analog Devices], AD5780ACPZ Datasheet - Page 24

• Manufacturer Part Number: AD5780ACPZ
• Manufacturer: AD [Analog Devices]

AD5780
AD5780
POWER-ON TO 0 V
The
resetting all registers to their default values, controls the output
voltage during power-up. Upon power-on, the DAC is placed in
tristate (its reference inputs are disconnected), and its output is
clamped to AGND through a ~6 kΩ resistor. The DAC remains
in this state until programmed otherwise via the control register.
This is a useful feature in applications where it is important to
know the state of the DAC output while it is in the process of
powering up.
CONFIGURING THE
After power-on, the
normal operating mode before programming the output. To
do this, the control register must be programmed. The DAC
is removed from tristate by clearing the DACTRI bit, and the
output clamp is removed by clearing the OPGND bit. At this
point, the output goes to V
programmed to the DAC register.
DAC OUTPUT STATE
The DAC output can be placed in one of three states, controlled
by the DACTRI and OPGND bits of the control register, as
shown in Table 15.
Table 15. Output State Truth Table
DACTRI
0
0
1
1
OUTPUT AMPLIFIER CONFIGURATION
There are a number of different ways that an output amplifier
can be connected to the AD5780, depending on the voltage
references applied and the desired output voltage span.
AD5780
OPGND
0
1
0
1
FEATURES
contains a power-on reset circuit that, as well as
AD5780
Output State
Normal operating mode.
Output is clamped via ~6 kΩ to AGND.
Output is in tristate.
Output is clamped via ~6 kΩ to AGND.
AD5780
REFN
must be configured to put it into
unless an alternative value is first
Rev. C | Page 24 of 28
Unity-Gain Configuration
Figure 52 shows an output amplifier configured for unity gain.
In this configuration, the output spans from V
A second unity-gain configuration for the output amplifier is
one that removes an offset from the input bias currents of the
amplifier. It does this by inserting a resistance in the feedback
path of the amplifier that is equal to the output resistance of the
DAC. The DAC output resistance is 3.4 kΩ. By connecting R1
and R
available on chip. Because the resistors are all on one piece of
silicon, they are temperature coefficient matched. To enable this
mode of operation, the RBUF bit of the control register must be
set to Logic 1. Figure 53 shows how the output amplifier is
connected to the AD5780. In this configuration, the output
amplifier is in unity gain and the output spans from V
V
placed in the amplifier feedback path to improve dynamic
performance.
Figure 53. Output Amplifier in Unity Gain with Amplifier Input Bias Current
REFP
. This unity-gain configuration allows a capacitor to be
FB
V
REFN
V
in parallel, a resistance equal to the DAC resistance is
V
V
Figure 52. Output Amplifier in Unity-Gain Configuration
REFN
REFP
REFP
18-BIT
18-BIT
DAC
= 0V
DAC
A1
Compensation
6.8kΩ 6.8kΩ
R1
R1
6.8kΩ
AD5780
AD5780
R
FB
R
6.8kΩ
FB
V
V
R
OUT
R
INV
OUT
INV
FB
FB
AD8675,
ADA4898-1,
ADA4004-1
AD8675,
ADA4898-1,
ADA4004-1
10pF
REFN
Data Sheet
to V
V
V
REFN
OUT
OUT
REFP
.
to