SAA7108AE PHILIPS [NXP Semiconductors], SAA7108AE Datasheet - Page 123

• Manufacturer Part Number: SAA7108AE
• Description: HD-CODEC
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 85 Subaddresses 6CH and 6DH
Table 86 Subaddress 6DH
Table 87 Subaddress 6EH
Table 88 Logic levels and function of PHRES
Table 89 Logic levels and function of LDEL
2004 Jun 29
HTRIG
VTRIG
NVTRIG
BLCKON
PHRES
LDEL
FLC
DATA BYTE
DATA BYTE
DATA BYTE
HD-CODEC
PHRES1
LDEL1
0
0
1
1
0
0
1
1
DATA BYTE
DATA BYTE
sets the horizontal trigger phase related to chip-internal horizontal input
sets the vertical trigger phase related to chip-internal vertical input
values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed; increasing HTRIG decreases
delays of all internally generated timing signals; the default value is 0
increasing VTRIG decreases delays of all internally generated timing signals, measured in half
lines; variation range of VTRIG = 0 to 31 (1FH); the default value is 0
PHRES0
LOGIC
LEVEL
LDEL0
0
1
0
1
0
1
0
1
0
1
0
1
values of the VTRIG register are positive
values of the VTRIG register are negative
encoder in normal operation mode; default after reset
output signal is forced to blanking level
selects the phase reset mode of the colour subcarrier generator; see Table 88
selects the delay on luminance path with reference to chrominance path;
see Table 89
field length control; see Table 90
no subcarrier reset
subcarrier reset every two lines
subcarrier reset every eight fields
subcarrier reset every four fields
no luminance delay; default after reset
1 LLC luminance delay
2 LLC luminance delay
3 LLC luminance delay
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DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
SAA7108AE; SAA7109AE
Product specification