MK60DN256ZVMD10 FREESCALE [Freescale Semiconductor, Inc], MK60DN256ZVMD10 Datasheet - Page 50

no-image

MK60DN256ZVMD10

Manufacturer Part Number
MK60DN256ZVMD10
Description
K60 Sub-Family Data Sheet
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Peripheral operating requirements and behaviors
1. Typical hysteresis is measured with input voltage range limited to 0.6 to V
2. Comparator initialization delay is defined as the time between software writes to change control inputs (Writes to DACEN,
3. 1 LSB = V
50
Symbol
V
V
VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level.
I
I
DAC6b
V
V
CMPOh
DNL
CMPOl
t
t
DDLS
INL
V
DHS
DLS
AIN
AIO
H
Table 31. Comparator and 6-bit DAC electrical specifications (continued)
reference
Supply current, low-speed mode (EN=1, PMODE=0)
Analog input voltage
Analog input offset voltage
Analog comparator hysteresis
Output high
Output low
Propagation delay, high-speed mode (EN=1,
PMODE=1)
Propagation delay, low-speed mode (EN=1,
PMODE=0)
Analog comparator initialization delay
6-bit DAC current adder (enabled)
6-bit DAC integral non-linearity
6-bit DAC differential non-linearity
Description
• CR0[HYSTCTR] = 00
• CR0[HYSTCTR] = 01
• CR0[HYSTCTR] = 10
• CR0[HYSTCTR] = 11
/64
K60 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
1
2
V
V
SS
DD
–0.5
–0.3
Min.
120
20
– 0.3
– 0.5
DD
-0.6V.
Typ.
250
10
20
30
50
5
7
Freescale Semiconductor, Inc.
Max.
V
200
600
0.5
0.5
0.3
20
20
40
DD
LSB
LSB
Unit
mV
mV
mV
mV
mV
μA
μA
ns
ns
μs
V
V
V
3

Related parts for MK60DN256ZVMD10