MPC8247 MOTOROLA [Motorola, Inc], MPC8247 Datasheet - Page 21

• Manufacturer Part Number: MPC8247
• Description: MPC8272 PowerQUICC II Family Hardware Specifications
• Manufacturer: MOTOROLA [Motorola, Inc]

AC Electrical Characteristics
AC Electrical Characteristics
21
CLKin
CLKin
CLKin
1:2, 1:3, 1:4, 1:5, 1:6
PLL Clock Ratio
Generally, all MPC8272 bus and system output signals are driven from the
rising edge of the input clock (CLKin). Memory controller signals,
however, trigger on four points within a CLKin cycle. Each cycle is
divided by four internal ticks: T1, T2, T3, and T4. T1 always occurs at the
rising edge, and T3 at the falling edge, of CLKin. However, the spacing of
T2 and T4 depends on the PLL clock ratio selected, as shown in Table 13.
Figure 11 is a representation of the information in Table 13.
The UPM machine outputs change on the internal tick determined by the
memory controller programming; the AC specifications are relative to the
internal tick. Note that SDRAM and GPCM machine outputs change on
CLKin’s rising edge.
Figure 11. Internal Tick Spacing for Memory Controller Signals
MPC8272 PowerQUICC II™ Family Hardware Specifications
1:2.5
1:3.5
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
T1
T1
T1
Table 13. Tick Spacing for Memory Controller Signals
Freescale Semiconductor, Inc.
For More Information On This Product,
T2
T2
T2
Go to: www.freescale.com
T3
T3
T3
1/4 CLKin
3/10 CLKin
4/14 CLKin
NOTE
NOTE
Tick Spacing (T1 Occurs at the Rising Edge of CLKin)
T4
T4
T4
T2
1/2 CLKin
1/2 CLKin
1/2 CLKin
for 1:2, 1:3, 1:4, 1:5, 1:6
for 1:2.5
for 1:3.5
T3
3/4 CLKin
8/10 CLKin
11/14 CLKin
MOTOROLA
T4