MC68HC705C9ACB MOTOROLA [Motorola, Inc], MC68HC705C9ACB Datasheet - Page 49

• Manufacturer Part Number: MC68HC705C9ACB
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

3.3.3 Program Counter (PC)
3.3.4 Stack Pointer (SP)
3.3.5 Condition Code Register (CCR)
MC68HC705C9A — Rev. 4.0
MOTOROLA
The program counter is a 16-bit register that contains the address of the
next byte to be fetched.
The stack pointer contains the address of the next free location on the
stack. During an MCU reset or the reset stack pointer (RSP) instruction,
the stack pointer is set to location $0FF. The stack pointer is then
decremented as data is pushed onto the stack and incremented as data
is pulled from the stack.
When accessing memory, the eight most significant bits are permanently
set to 00000011. These eight bits are appended to the six least
significant register bits to produce an address within the range of $00FF
to $00C0. Subroutines and interrupts may use up to 64 (decimal)
locations. If 64 locations are exceeded, the stack pointer wraps around
and loses the previously stored information. A subroutine call occupies
two locations on the stack; an interrupt uses five locations.
The CCR is a 5-bit register in which four bits are used to indicate the
results of the instruction just executed, and the fifth bit indicates whether
interrupts are masked. These bits can be individually tested by a
program, and specific actions can be taken as a result of their state.
Each bit is explained in the following paragraphs.
Half Carry (H)
Interrupt (I)
This bit is set during ADD and ADC operations to indicate that a carry
occurred between bits 3 and 4.
When this bit is set, the timer, SCI, SPI, and external interrupt are
masked (disabled). If an interrupt occurs while this bit is set, the
interrupt is latched and processed as soon as the interrupt bit is
cleared.
Freescale Semiconductor, Inc.
For More Information On This Product,
Central Processor Unit (CPU)
Go to: www.freescale.com
Central Processor Unit (CPU)
Advance Information
CPU Registers
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