MC68HC705JD FREESCALE [Freescale Semiconductor, Inc], MC68HC705JD Datasheet - Page 73

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MC68HC705JD

Manufacturer Part Number
MC68HC705JD
Description
member of the low-cost
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
11.6 Control Timing (V
Rev. 2
Edge and Level-Sensitive Trigger — If IRQ remains low after interrupt is serviced, the next interrupt is recognized.
Edge-Sensitive Trigger — The minimum t ILIH is either 125 ns (V DD = 5 V) or 250 ns (V DD = 3 V). The period t ILIL
should not be less than the number of t cyc cycles it takes to execute the interrupt service routine plus 19 t cyc cycles.
IRQ (MCU)
IRQ (PIN)
NOTES:
Oscillator Frequency
Internal Operating Frequency
Cycle Time
RESET Pulse Width
Timer Resolution (NOTE 1)
Interrupt Pulse Width Low (Edge-Triggered)
Interrupt Pulse Period
OSC1 Pulse Width
Programming Time per Byte
IRQ
IRQ
(V
1. The 2-bit timer prescaler is the limiting factor in determining timer resolution.
2. The minimum period t
Crystal Option
External Clock Option
Crystal (f
External Clock (f
1
n
DD
interrupt service routine plus 19 t
= 5.0 Vdc 10%, V
osc
t
ILIH
Characteristic
2)
Table 11-5. Control Timing (V
osc
Freescale Semiconductor, Inc.
DD
Figure 11-6. External Interrupt Timing
t
For More Information On This Product,
ILIH
2)
= 5.0 Vdc)
SS
ILIL
= 0 Vdc; T
ELECTRICAL SPECIFICATIONS
should not be less than the number of cycle times it takes to execute the
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t
ILIL
cyc
A
= T
.
L
to T
H
)
Symbol
t
OH
t
t
EPGM
RESL
t
t
f
t
t
f
ILIH
ILIL
osc
cyc
RL
op
, t
DD
OL
= 5.0 Vdc)
(NOTE 2)
Min
480
125
1.5
4.0
90
dc
dc
4
Max
4.2
4.2
2.1
2.1
NORMALLY
USED WITH
WIRED–OR
CONNECTION
Unit
MHz
MHz
t
t
t
ms
ns
cyc
cyc
ns
cyc
ns
11-7
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9

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