PIC18F2480 MICROCHIP [Microchip Technology], PIC18F2480 Datasheet - Page 154

• Manufacturer Part Number: PIC18F2480
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2480/2580/4480/4580
12.1
Timer1 can operate in one of these modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>). When TMR1CS is cleared
(= 0), Timer1 increments on every internal instruction
FIGURE 12-1:
FIGURE 12-2:
DS39637A-page 152
T1OSO/T13CKI
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Timer1 Operation
T1OSI
T1OSI
Timer1 Oscillator
T1OSCEN
T1CKPS1:T1CKPS0
T1SYNC
TMR1ON
TIMER1 BLOCK DIAGRAM
TIMER1 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
Timer1 Oscillator
T1OSCEN
T1CKPS1:T1CKPS0
T1SYNC
TMR1ON
(1)
(1)
TMR1CS
(CCP Special Event Trigger)
TMR1CS
Clear TMR1
(CCP Special Event Trigger)
Clear TMR1
Clock
Internal
F
Clock
Internal
OSC
F
OSC
/4
/4
Preliminary
On/Off
1
0
1
0
Prescaler
1, 2, 4, 8
Prescaler
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
When Timer1 is enabled, the RC1/T1OSI and RC0/
T1OSO/T13CKI pins become inputs. This means the
values of TRISC<1:0> are ignored and the pins are
read as ‘0’.
1, 2, 4, 8
2
2
OSC
TMR1L
TMR1L
/4). When the bit is set, Timer1 increments
8
Sleep Input
Synchronize
Sleep Input
8
Synchronize
Detect
Detect
High Byte
High Byte
TMR1H
TMR1
TMR1
8
 2004 Microchip Technology Inc.
8
8
1
0
Internal Data Bus
Read TMR1L
1
1
0
Write TMR1L
on Overflow
on Overflow
TMR1IF
TMR1IF
Set
Set
Timer1
On/Off
Timer1
On/Off