PIC18F2480 MICROCHIP [Microchip Technology], PIC18F2480 Datasheet - Page 253

• Manufacturer Part Number: PIC18F2480
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

The value in the ADRESH/ADRESL registers is not
modified for a Power-on Reset. The ADRESH/ADRESL
registers will contain unknown data after a Power-on
Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 19.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started. An acquisition time can be programmed to
occur between setting the GO/DONE bit and the actual
start of the conversion.
The following steps should be followed to perform an
A/D conversion:
1.
FIGURE 19-2:
 2004 Microchip Technology Inc.
Configure the A/D module:
• Configure analog pins, voltage reference and
• Select A/D input channel (ADCON0)
• Select A/D acquisition time (ADCON2)
• Select A/D conversion clock (ADCON2)
• Turn on A/D module (ADCON0)
digital I/O (ADCON1)
Legend: C
V
AIN
Rs
V
I
R
SS
C
R
LEAKAGE
T
ANALOG INPUT MODEL
PIN
IC
HOLD
SS
ANx
C
5 pF
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
= sampling switch resistance
various junctions
V
DD
PIC18F2480/2580/4480/4580
V
V
T
T
= 0.6V
= 0.6V
Preliminary
I
± 500 nA
LEAKAGE
2.
3.
4.
5.
6.
7.
R
IC
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
Wait the required acquisition time (if required).
Start conversion:
• Set GO/DONE bit (ADCON0 register)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result registers (ADRESH:ADRESL);
clear bit ADIF, if required.
For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as T
required before next acquisition starts.
1k
V
SS
DD
Sampling
Switch
6V
5V
4V
3V
2V
AD
R
SS
. A minimum wait of 2 T
Sampling Switch
5 6 7 8 9 10 11
V
SS
C
HOLD
DS39637A-page 251
= 120 pF
(k )
AD
is