MC68HC912D60A MOTOROLA [Motorola, Inc], MC68HC912D60A Datasheet - Page 220
MC68HC912D60A
Manufacturer Part Number
MC68HC912D60A
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912D60A.pdf
(460 pages)
- Current page: 220 of 460
- Download datasheet (4Mb)
Pulse Width Modulator
PWTST — PWM Special Mode Register (“Test”)
Technical Data
220
RESET:
DISCR
Bit 7
0
DISCP
6
0
RDPP — Reduced Drive of Port P
PUPP — Pull-Up Port P Enable
PSBCK — PWM Stops while in Background Mode
Read anytime but write only in special mode (SMODN = 0). These bits
are available only in special mode and are reset in normal mode.
DISCR — Disable Reset of Channel Counter on Write to Channel
Counter
DISCP — Disable Compare Count Period
DISCAL — Disable Load of Scale-Counters on Write to the Associated
Scale-Registers
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = All port P output pins have normal drive capability.
1 = All port P output pins have reduced drive capability.
0 = All port P pins have an active pull-up device disabled.
1 = All port P pins have an active pull-up device enabled.
0 = Allows PWM to continue while in background mode.
1 = Disable PWM input clock when the part is in background mode.
0 = Normal operation. Write to PWM channel counter will reset
1 = Write to PWM channel counter does not reset channel counter.
0 = Normal operation
1 = In left-aligned output mode, match of period does not reset the
0 = Normal operation
1 = Write to PWSCAL0 and PWSCAL1 does not load scale
DISCAL
5
0
channel counter.
associated PWM counter register.
counters
Go to: www.freescale.com
Pulse Width Modulator
4
0
0
3
0
0
2
0
0
MC68HC912D60A — Rev 3.0
1
0
0
Bit 0
0
0
MOTOROLA
$0055
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