AD8139 AD [Analog Devices], AD8139 Datasheet - Page 18

• Manufacturer Part Number: AD8139
• Description: Low Noise Rail-to-Rail Differential ADC Driver
• Manufacturer: AD [Analog Devices]

AD8139
THEORY OF OPERATION
The AD8139 is a high speed, low noise differential amplifier
fabricated on the Analog Devices second generation eXtra Fast
Complementary Bipolar (XFCB) process. It is designed to
provide two closely balanced differential outputs in response to
either differential or single-ended input signals. Differential
gain is set by external resistors, similar to traditional voltage-
feedback operational amplifiers. The common-mode level of the
output voltage is set by a voltage at the V
pendent of the input common-mode voltage. The AD8139 has
an H-bridge input stage for high slew rate, low noise, and low
distortion operation and rail-to-rail output stages that provide
maximum dynamic output range. This set of features allows for
convenient single-ended-to-differential conversion, a common
need to take advantage of modern high resolution ADCs with
differential inputs.
TYPICAL CONNECTION AND DEFINITION OF
TERMS
Figure 57 shows a typical connection for the AD8139, using
matched external R
terminals of the AD8139, V
junctions. An external reference voltage applied to the V
terminal sets the output common-mode voltage. The two
output terminals, V
balanced fashion in response to an input signal.
The differential output voltage is defined as
Common-mode voltage is the average of two voltages. The
output common-mode voltage is defined as
Output Balance
Output balance is a measure of how well V
matched in amplitude and how precisely they are 180 degrees
out of phase with each other. It is the internal common-mode
feedback loop that forces the signal component of the output
common-mode towards zero, resulting in the near perfectly
V
V
O,
O,
cm
dm
V
OCM
V
V
=
=
IP
IN
V
V
OP
OP
R
R
−
G
G
+
2
F
OP
V
Figure 57. Typical Connection
V
/R
ON
ON
and V
V
V
G
AP
AN
networks. The differential input
+
–
AD8139
AP
ON
C
R
R
C
F
F
F
F
and V
, move in opposite directions in a
AN
V
V
ON
OP
, are used as summing
OCM
R
OP
L, dm
pin and is inde-
and V
V
O, dm
ON
–
+
are
OCM
Rev. A | Page 18 of 24
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(2)
balanced differential outputs of identical amplitude and exactly
180 degrees out of phase. The output balance performance does not
require tightly matched external components, nor does it require
that the feedback factors of each loop be equal to each other. Low
frequency output balance is limited ultimately by the mismatch
of an on-chip voltage divider, which is trimmed for optimum
performance.
Output balance is measured by placing a well matched resistor
divider across the differential voltage outputs and comparing
the signal at the divider’s midpoint with the magnitude of the
differential output. By this definition, output balance is equal to
the magnitude of the change in output common-mode voltage
divided by the magnitude of the change in output differential-
mode voltage:
The block diagram of the AD8139 in Figure 58 shows the
external differential feedback loop (R
differential input transconductance amplifier, G
internal common-mode feedback loop (voltage divider across
V
amplifier, G
voltages at the summing junctions V
equal to each other.
The common-mode feedback loop drives the output common-
mode voltage, sampled at the midpoint of the two 500 Ω resistors,
to equal the voltage set at the V
OP
and V
and
V
V
V
V
V
Output
IN
IP
OP
ON
AN
=
V
V
=
=
ON
AN
AP
R
R
V
V
V
CM
G
G
and the common-mode input transconductance
OCM
OCM
Balance
AP
). The differential negative feedback drives the
+
−
G
DIFF
V
V
O,
O,
=
2
Figure 58. Block Diagram
2
dm
dm
Δ
Δ
+
+
V
V
O,
O,
dm
cm
OCM
MIDSUPPLY
terminal. This ensures that
AN
F
/R
and V
G
G
G
10pF
10pF
G
O
O
networks and the
CM
AP
R
R
F
F
to be essentially
DIFF
500Ω
500Ω
) and the
V
V
V
OP
OCM
ON
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(4)
(5)
(6)