PX1011B_11 NXP [NXP Semiconductors], PX1011B_11 Datasheet - Page 6

• Manufacturer Part Number: PX1011B_11
• Description: PCI Express stand-alone X1 PHY Receiver detection
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PX1011B
Product data sheet
7.2 Pin description
The PHY input and output pins are described in
output is defined from the perspective of the PHY. Thus a signal on a pin described as an
output is driven by the PHY and a signal on a pin described as an input is received by the
PHY. A basic description of each pin is provided.
Table 5.
Table 6.
Table 7.
Table 8.
Symbol
RX_P
Symbol
TXDATA[7:0]
TXDATAK
Symbol
RXDATA[7:0]
RXDATAK
Symbol
RXDET_ LOOPB
TXIDLE
TXCOMP
RXPOL
RESET_N
PWRDWN0
PWRDWN1
RX_N
TX_P
TX_N
PCI Express serial data lines
PXPIPE interface transmit data signals
PXPIPE interface receive data signals
PXPIPE interface command signals
Pin
E1
F1
H1
J1
Pin
J9, H9, G8, G9,
F8, F9, E9, D9
J7
Pin
B3, A3, B4, A4,
A5, B6, A6, B7
A7
All information provided in this document is subject to legal disclaimers.
Pin
H7
J5
J4
J3
H6
J6
H4
Rev. 5 — 18 April 2011
Type
input
input
input
input
input
input
input
Type
input
Type
input
input
Type
output
output
input
output
output
SSTL_2
SSTL_2
Signaling
SSTL_2
SSTL_2
SSTL_2
SSTL_2
SSTL_2
SSTL_2
SSTL_2
Signaling
PCIe I/O
PCIe I/O
PCIe I/O
PCIe I/O
Signaling
SSTL_2
SSTL_2
Signaling
Description
used to tell the PHY to begin a receiver
detection operation or to begin loopback;
LOW = reset state
forces TX output to electrical idle. TXIDLE
should be asserted while in power states P0s
and P1.
used when transmitting the compliance
pattern; HIGH-level sets the running disparity
to negative
signals the PHY to perform a polarity inversion
on the receive data; LOW = PHY does no
polarity inversion; HIGH = PHY does polarity
inversion
PHY reset input; active LOW
transceiver power-up and power-down inputs
(see
Table 5
Table
Description
differential input receive pair with 50 Ω
on-chip termination
differential output transmit pair with
50 Ω on-chip termination
Description
8-bit transmit data input from the MAC
to the PHY
selection input for the symbols of
transmit data; LOW = data byte;
HIGH = control byte
Description
8-bit receive data output from the PHY
to the MAC
selection output for the symbols of
receive data; LOW = data byte;
HIGH = control byte
PCI Express stand-alone X1 PHY
to
13); 0x2 = reset state
Table
12. Note that input and
PX1011B
© NXP B.V. 2011. All rights reserved.
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