HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 1247

• Manufacturer Part Number: HD6412320
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

TSR2—Timer Status Register 2
Bit
Initial value
Read/Write
Note:
*
Can only be written with 0 for flag clearing.
:
:
:
Count Direction Flag
TCFD
0
1
R
7
1
TCNT counts down
TCNT counts up
—
—
6
1
Underflow Flag
R/(W)*
TCFU
0
1
5
0
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
Overflow Flag
R/(W)*
TCFV
0
1
4
0
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
—
—
3
0
—
—
2
0
Input Capture/Output Compare Flag B
0
1
Rev.6.00 Sep. 27, 2007 Page 1217 of 1268
H'FFF5
R/(W)*
TGFB
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
1
0
output compare register
capture signal while TGRB is functioning as input
capture register
bit of MRB in DTC is 0
TGFB = 1
Note: 1. The DMAC is not supported in the H8S/2321.
Input Capture/Output Compare Flag A
0
1
R/(W)*
TGFA
0
0
Appendix B Internal I/O Registers
[Clearing conditions]
• When DTC is activated by TGIA interrupt
• When DMAC
• When 0 is written to TGFA after reading
[Setting conditions]
• When TCNT = TGRA while TGRA is
• When TCNT value is transferred to TGRA by
while DISEL bit of MRB in DTC is 0
while DTA bit of DMABCR in DMAC
TGFA = 1
functioning as output compare register
input capture signal while TGRA is functioning
as input capture register
*1
is activated by TGIA interrupt
REJ09B0220-0600
*1
is 1
TPU2