74AHC240 NXP [NXP Semiconductors], 74AHC240 Datasheet - Page 2

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74AHC240

Manufacturer Part Number
74AHC240
Description
Octal buffer/line driver; inverting; 3-state
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
4. Functional diagram
5. Pinning information
74AHC_AHCT240
Product data sheet
Fig 1.
Fig 3.
Logic symbol
Pin configuration SO20 and TSSOP20
GND
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
17
15
13
11
19
2
4
6
8
1
10
1
2
3
4
5
6
7
8
9
5.1 Pinning
1OE
2OE
1A0
2A0
1A1
2A1
1A2
2A2
1A3
2A3
74AHCT240
74AHC240
001aal192
1Y0
2Y0
1Y1
2Y1
1Y2
2Y2
1Y3
2Y3
mgu779
All information provided in this document is subject to legal disclaimers.
20
19
18
17
16
15
14
13
12
11
18
16
14
12
3
5
7
9
V
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
2A3
CC
Rev. 2 — 26 November 2010
Fig 2.
Fig 4.
74AHC240; 74AHCT240
(1) This is not a supply pin. The substrate is attached to this
IEC logic symbol
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Pin configuration DHVQFN20
index area
Octal buffer/line driver; inverting; 3-state
terminal 1
19
11
13
15
17
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
1
2
4
6
8
Transparent top view
2
3
4
5
6
7
8
9
EN
EN
74AHCT240
74AHC240
GND
mgu778
(1)
19
18
17
16
15
14
13
12
18
16
14
12
© NXP B.V. 2010. All rights reserved.
001aal193
9
7
5
3
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
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