AT24C512B-10PU-1.8 ATMEL [ATMEL Corporation], AT24C512B-10PU-1.8 Datasheet

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AT24C512B-10PU-1.8

Manufacturer Part Number
AT24C512B-10PU-1.8
Description
Two-wire Serial EEPROM 512K (65,536 x 8) with Three Device Address Inputs
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
Description
The AT24C512B provides 524,288 bits of serial electrically erasable and programma-
ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The
device’s cascadable feature allows up to four devices to share a common two-wire
bus. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The devices are available in
space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array
(LAP), and 8-lead SAP packages. In addition, the entire family is available in a 1.8V
(1.8V to 3.6V) version.
Table 1. Pin Configurations
Pin Name
A0–A2
SDA
SCL
WP
NC
Low-voltage and Standard-voltage Operation
Internally Organized 65,536 x 8
Two-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (3.6V), 400 kHz (1.8V) Compatibility
Write Protect Pin for Hardware and Software Data Protection
128-byte Page Write Mode (Partial Page Writes Allowed)
Self-timed Write Cycle (5 ms Max)
High Reliability
Lead-free/Halogen-free Devices Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP,
8-lead LAP and 8-lead SAP Packages
Die Sales: Wafer Form, Waffle Pack and Bumped Die
– 1.8 (V
– Endurance: 1,000,000 Write Cycles
– Data Retention: 40 Years
CC
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No Connect
= 1.8V to 3.6V)
GND
8-lead Leadless Array
VCC
SDA
A0
A1
A2
SCL
WP
8-lead TSSOP
Bottom View
8
7
6
5
1
2
3
4
GND
8
7
6
5
A0
A1
A2
1
2
3
4
A0
A1
A2
GND
VCC
WP
SCL
SDA
8-lead SOIC
1
2
3
4
GND
8
7
6
5
VCC
SDA
SCL
WP
A0
A1
A2
Bottom View
8-lead PDIP
VCC
WP
SCL
SDA
8-lead SAP
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
A0
A1
A2
GND
VCC
WP
SCL
SDA
Two-wire Serial
EEPROM
512K (65,536 x 8)
AT24C512B
with Three Device
Address Inputs
Preliminary
Rev. 5112A–SEEPR–8/05
1

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AT24C512B-10PU-1.8 Summary of contents

Page 1

... Die Sales: Wafer Form, Waffle Pack and Bumped Die Description The AT24C512B provides 524,288 bits of serial electrically erasable and programma- ble read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s cascadable feature allows up to four devices to share a common two-wire bus ...

Page 2

... Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage ............................................ 4.3V DC Output Current........................................................ 3.0 mA Figure 1. Block Diagram AT24C512B [Preliminary] 2 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and ...

Page 3

... Atmel recommends always connecting the WP pins to a known state. When using a pull-up resistor, Atmel recommends using 10kΩ or less. AT24C512B, 512K SERIAL EEPROM: The 512K is internally organized as 512 pages of 128-bytes each. Random word addressing requires a 16-bit data word address. AT24C512B [Preliminary] ...

Page 4

... Input High Level IH V Output Low Level OL2 V Output Low Level OL1 Note min and V max are reference only and are not tested AT24C512B [Preliminary 25° 1.0 MHz SCL −40°C to +85° Test Condition V = 3.6V READ at 400 kHz ...

Page 5

... Figure 5 on page 7). ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. AT24C512B [Preliminary] = +1.8V to +3.6V 100 pF (unless oth- CC 2.5-volt 3 ...

Page 6

... WR AT24C512B [Preliminary] 6 STANDBY MODE: The AT24C512B features a low power standby mode which is enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal operations. MEMORY RESET: After an interruption in protocol, power loss or system reset, any two- ...

Page 7

... Figure 4. Data Validity Figure 5. Start and Stop Definition Figure 6. Output Acknowledge 5112A–SEEPR–8/05 AT24C512B [Preliminary] 7 ...

Page 8

... Upon a compare of the device address, the EEPROM will output a “0” compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C512B has a hardware data protection scheme that allows the user to Write Protect the whole memory when the WP pin BYTE WRITE: A write operation requires two 8-bit data word addresses following the device address word and acknowledgment ...

Page 9

... The sequential read operation is terminated when the microcontroller does not respond with a “0” but does generate a following stop condition (see Figure 12 on page 11). Figure 7. Device Address MSB AT24C512B [Preliminary R ...

Page 10

... Figure 8. Byte Write Figure 9. Page Write Figure 10. Current Address Read Figure 11. Random Read AT24C512B [Preliminary] 10 5112A–SEEPR–8/05 ...

Page 11

... Figure 12. Sequential Read 5112A–SEEPR–8/05 AT24C512B [Preliminary] 11 ...

Page 12

... Ordering Information Ordering Code (1) AT24C512BC1-10CU-1.8 (1) AT24C512B-10PU-1.8 (1) AT24C512BN-10SU-1.8 (1) AT24C512B-10TU-1.8 (1) AT24C512BY4-10YU-1.8 (2) AT24C512B-W1.8-11 Notes: 1. “U” designates Green package + RoHS compliant. 2. Available in waffle pack and wafer form; order as SL719 for wafer form. Bumped die available upon request. Please contact Serial EEPROM marketing. 8CN1 8-lead, 0.300" Wide, Leadless Array Package (LAP) 8P3 8-lead, 0.300" ...

Page 13

... E.Cheyenne Mtn Blvd. Colorado Springs, CO 80906 R 5112A–SEEPR–8/05 D Top View Pin1 Corner TITLE 8CN1, 8-lead ( 1.04 mm Body), Lead Pitch 1.27 mm, Leadless Array Package (LAP) AT24C512B [Preliminary Side View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 0.94 1.04 1.14 A1 0.30 0.34 ...

Page 14

... E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT24C512B [Preliminary ...

Page 15

... E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5112A–SEEPR–8/ Top View TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) AT24C512B [Preliminary ∅ End View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 1.35 – ...

Page 16

... Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R AT24C512B [Preliminary TITLE 8A2, 8-lead, 4 ...

Page 17

... SAP PIN 1 INDEX AREA D E 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 5112A–SEEPR–8/05 AT24C512B [Preliminary] A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 D 5.80 E 4.70 D1 2.85 E1 2. 0.50 TITLE 8Y4, 8-lead (6.00 x 4.90 mm Body) SOIC Array Package ...

Page 18

... Atmel Corporation 2005. All rights reserved. Atmel®, logo and combinations thereof, Everywhere You Are® and others, are registered trade- marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA ...

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