AT24C512B-10PU-1.8 ATMEL [ATMEL Corporation], AT24C512B-10PU-1.8 Datasheet - Page 9

• Manufacturer Part Number: AT24C512B-10PU-1.8
• Description: Two-wire Serial EEPROM 512K (65,536 x 8) with Three Device Address Inputs
• Manufacturer: ATMEL [ATMEL Corporation]

Read Operations
5112A–SEEPR–8/05
Read operations are initiated the same way as write operations with the exception that
the Read/Write select bit in the device address word is set to “1”. There are three read
operations: current address read, random address read and sequential read.
CURRENT ADDRESS READ: The internal data word address counter maintains the
last address accessed during the last read or write operation, incremented by “1”. This
address stays valid between operations as long as the chip power is maintained. The
address roll over during read is from the last byte of the last memory page, to the first
byte of the first page.
Once the device address with the Read/Write select bit set to “1” is clocked in and
acknowledged by the EEPROM, the current address data word is serially clocked out.
The microcontroller does not respond with an input “0” but does generate a following
stop condition (see Figure 10 on page 10).
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the
data word address. Once the device address word and data word address are clocked
in and acknowledged by the EEPROM, the microcontroller must generate another start
condition. The microcontroller now initiates a current address read by sending a device
address with the Read/Write select bit high. The EEPROM acknowledges the device
address and serially clocks out the data word. The microcontroller does not respond
with a “0” but does generate a following stop condition (see Figure 11 on page 10).
SEQUENTIAL READ: Sequential reads are initiated by either a current address read or
a random address read. After the microcontroller receives a data word, it responds with
an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to
increment the data word address and serially clock out sequential data words. When the
memory address limit is reached, the data word address will roll over and the sequential
read will continue. The sequential read operation is terminated when the microcontroller
does not respond with a “0” but does generate a following stop condition (see Figure 12
on page 11).
Figure 7. Device Address
MSB
1
0
1
AT24C512B [Preliminary]
0
A
2
A
1
A
0
R/W
LSB
9