M95512-W STMICROELECTRONICS [STMicroelectronics], M95512-W Datasheet - Page 9

• Manufacturer Part Number: M95512-W
• Description: 512Kbit Serial SPI Bus EEPROM With High Speed Clock
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

OPERATING FEATURES
Power-up
When the power supply is turned on, V
from V
During this time, the Chip Select (S) must be al-
lowed to follow the V
lowed to float, but should be connected to V
a suitable pull-up resistor.
As a built in safety feature, Chip Select (S) is edge
sensitive as well as level sensitive. After Power-
up, the device does not become selected until a
falling edge has first been detected on Chip Select
(S). This ensures that Chip Select (S) must have
been High, prior to going Low to start the first op-
eration.
Power On Reset
In order to prevent inadvertent Write operations
during Power-up, a Power On Reset (POR) circuit
is included. At Power-up, the device will not re-
spond to any instruction until the VCC has reached
the Power On Reset threshold voltage (this thresh-
old is lower than the VCC min operating voltage
defined in
as soon as VCC drops from the normal operating
voltage to below the Power On Reset threshold
voltage, the device stops responding to any in-
struction sent to it.
Prior to selecting and issuing instructions to the
memory, a valid and stable VCC voltage must be
applied. This voltage must remain stable and valid
until the end of the transmission of the instruction
and, for a Write instruction, until the completion of
the internal write cycle (t
Power-down
At Power-down, the device must be deselected.
Chip Select (S) should be allowed to follow the
voltage applied on V
Figure 6. Hold Condition Activation
SS
HOLD
to V
Table 8.
C
CC
.
and
CC
CC
Table
.
voltage. It must not be al-
W
).
9.). In the same way,
Condition
CC
Hold
CC
rises
via
Active Power and Standby Power Modes
When Chip Select (S) is Low, the device is select-
ed, and in the Active Power mode. The device
consumes I
When Chip Select (S) is High, the device is dese-
lected. If an Erase/Write cycle is not currently in
progress, the device then goes in to the Standby
Power mode, and the device consumption drops
to I
Hold Condition
The Hold (HOLD) signal is used to pause any se-
rial communications with the device without reset-
ting the clocking sequence.
During the Hold condition, the Serial Data Output
(Q) is high impedance, and Serial Data Input (D)
and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be
selected, with Chip Select (S) Low.
Normally, the device is kept selected, for the whole
duration of the Hold condition. Deselecting the de-
vice while it is in the Hold condition, has the effect
of resetting the state of the device, and this mech-
anism can be used if it is required to reset any pro-
cesses that had been in progress.
The Hold condition starts when the Hold (HOLD)
signal is driven Low at the same time as Serial
Clock (C) already being Low (as shown in
6.).
The Hold condition ends when the Hold (HOLD)
signal is driven High at the same time as Serial
Clock (C) already being Low.
Figure 6.
and falling edges are not timed to coincide with
Serial Clock (C) being Low.
CC1
.
also shows what happens if the rising
CC
, as specified in
Condition
Hold
M95512-W, M95512-R
Table 13.
AI02029D
Figure
9/31