CY62148-55 CYPRESS [Cypress Semiconductor], CY62148-55 Datasheet

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CY62148-55

Manufacturer Part Number
CY62148-55
Description
512K x 8 Static RAM
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
Features
Functional Description
The CY62148 is a high-performance CMOS static RAM orga-
nized as 524,288 words by 8 bits. Easy memory expansion is
provided by an active LOW chip enable (CE), an active LOW
output enable (OE), and three-state drivers. This device has
Selection Guide
Cypress Semiconductor Corporation
Maximum Access Time (ns)
Maximum Operating Current
Maximum CMOS Standby Current
Shaded areas contain advance information
• 4.5V 5.5V operation
• CMOS for optimum speed/power
• Low active power
• Low standby power (L version)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE options
Logic Block Diagram
WE
CE
OE
— 660 mW (max.)
— 2.75 mW (max.)
A
A
A
A
A
A
A
A
A
A
A
10
3
4
5
6
7
8
9
0
1
2
INPUT BUFFER
512K x 8
DECODER
COLUMN
ARRAY
POWER
DOWN
3901 North First Street
PRELIMINARY
62148-1
an automatic power-down feature that reduces power con-
sumption by more than 99% when deselected.
Writing to the device is accomplished by taking chip enable
one (CE) and write enable (WE) inputs LOW. Data on the eight
I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking chip en-
able one (CE) and output enable (OE) LOW while forcing write
enable (WE). Under these conditions, the contents of the
memory location specified by the address pins will appear on
the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY62148 is available in a standard 450-mil-wide body
width SOIC package.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Commercial
Commercial
0
1
2
3
4
5
6
7
San Jose
0
through I/O
512K x 8 Static RAM
L
December 1996 - Revised July 31, 1997
Pin Configuration
GND
I/O
I/O
I/O
A
A
A
A
7
A
A
A
A
A
A
A
A
16
14
12
17
CY62148–55
) is then written into the location
7
6
5
4
3
2
1
0
0
1
2
CA 95134
120 mA
Top View
0.5 mA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
0
2 mA
0
SOIC
55
through I/O
through A
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
A
CE
I/O
I/O
I/O
I/O
I/O
V
A
WE
A
A
A
OE
A
18
10
CC
15
13
8
9
11
18
7
6
5
4
3
7
) are placed in a
CY62148
CY62148–70
fax id: 1079
).
408-943-2600
120 mA
0.5 mA
2 mA
70

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CY62148-55 Summary of contents

Page 1

... TTL-compatible inputs and outputs • Easy memory expansion with CE and OE options Functional Description The CY62148 is a high-performance CMOS static RAM orga- nized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE), an active LOW output enable (OE), and three-state drivers. This device has ...

Page 2

... MAX Max Com’ – 0.3V – 0.3V 0.3V, f=0 IN Test Conditions MHz 5. CY62148 [1] ................................. –0. Ambient [2] Temperature + 10% – + 10% 62148–55 62148–70 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 2.2 V ...

Page 3

... R1 480 5V 3.0V R2 GND 5 pF 255 INCLUDING JIG AND SCOPE (b) 109–3 1.73V Description is less than less than t HZCE LZCE HZOE LZOE 3 CY62148 ALL INPUT PULSES 90% 10% 3ns 62148–55 62148–70 Min. Max. Min. Max ...

Page 4

... If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. PRELIMINARY OHA ACE t DOE LZOE 50 SCE PWE t SD DATA VALID . IL 4 CY62148 DATA VALID t HZOE t HZCE IMPEDANCE DATA VALID 62148-5 HIGH ICC ISB 62148-6 62148-7 ...

Page 5

... DATAI/O t HZWE Note: 15. During this period the I/Os are in the output state and input signals should not be applied PRELIMINARY [13,14 SCE PWE t SD DATA VALID IN [13,14 SCE PWE t SD DATA VALID 5 CY62148 62148 LZWE 62148-9 ...

Page 6

... Operation Recovery Time R Ordering Information Speed Package (ns) Ordering Code 55 CY62148–55SC 55 CY62148L–55SC 70 CY62148–70SC 70 CY62148L–70SC 70 CY62148-70SI 70 CY62148L-70SI Shaded areas contain advance information. Document #: 38-00564-A PRELIMINARY Mode Power Standby (I SB Standby (I SB Active ( Active ( Active ( Over the Operating Range ...

Page 7

... Package Diagrams PRELIMINARY 32-Lead (450 Mil) Molded SOIC S34 7 CY62148 ...

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