A3PE1500-1FG896 ACTEL [Actel Corporation], A3PE1500-1FG896 Datasheet - Page 23

• Manufacturer Part Number: A3PE1500-1FG896
• Description: ProASIC3E Flash Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Guidelines
Toggle Rate Definition
A toggle rate defines the frequency of a net or logic element relative to a clock. It is a percentage.
If the toggle rate of a net is 100%, this means that this net switches at half the clock frequency.
Below are some examples:
Enable Rate Definition
Output enable rate is the average percentage of time during which tristate outputs are enabled.
When nontristate output buffers are used, the enable rate should be 100%.
Table 2-11 • Toggle Rate Guidelines Recommended for Power Calculation
Table 2-12 • Enable Rate Guidelines Recommended for Power Calculation
Component
α
α
Component
β
β
β
1
2
3
1
2
•
•
The average toggle rate of a shift register is 100% as all flip-flop outputs toggle at half of
the clock frequency.
The average toggle rate of an 8-bit counter is 25%:
–
–
–
–
–
–
Bit 0 (LSB) = 100%
Bit 1
Bit 2
…
Bit 7 (MSB) = 0.78125%
Average toggle rate = (100% + 50% + 25% + 12.5% + . . . + 0.78125%) / 8
Toggle rate of VersaTile outputs
I/O buffer toggle rate
I/O output buffer enable rate
RAM enable rate for read operations
RAM enable rate for write operations
= 50%
= 25%
v1.2
Definition
Definition
ProASIC3E DC and Switching Characteristics
Guideline
Guideline
12.5%
12.5%
100%
10%
10%
2 - 11