HYB18T512160A Infineon Technologies AG, HYB18T512160A Datasheet - Page 46

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HYB18T512160A

Manufacturer Part Number
HYB18T512160A
Description
512-Mbit Double-Data-Rate-Two SDRAM
Manufacturer
Infineon Technologies AG
Datasheet

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Figure 36
2.6.6
Interruption of a read or write burst is prohibited for
burst length of 4 and only allowed for burst length of 8
under the following conditions:
1. A Read Burst of 8 can only be interrupted by
2. A Write Burst of 8 can only be interrupted by
3. Read burst interrupt must occur exactly two clocks
4. Write burst interrupt must occur exactly two clocks
5. Read or Write burst interruption is allowed to any
Data Sheet
D Q S ,
D Q S
C K , C K
C M D
another Read command. Read burst interruption by
a Write or Precharge Command is prohibited.
another Write command. Write burst interruption by
a Read or Precharge Command is prohibited.
after the previous Read command. Any other Read
burst interrupt timings are prohibited.
after the previous Write command. Any other Read
burst interrupt timings are prohibited.
bank inside the DDR2 SDRAM.
D Q
D M
W R IT E A
T0
Write Operation with Data Mask Example: RL = 3 (AL = 0, CL = 3), WL = 2,
Burst Interruption
WL = RL-1 = 2
<= tDQSS
T1
N O P
DIN A0 DIN A1
T2
N O P
DIN A2
T3
N O P
DIN A3
T4
46
N O P
6. Read or Write burst with Auto-Precharge enabled is
7. Read burst interruption is allowed by a Read with
8. Write burst interruption is allowed by a Write with
9. All command timings are referenced to burst length
512-Mbit Double-Data-Rate-Two SDRAM
not allowed to be interrupted.
Auto-Precharge command.
Auto-Precharge command.
set in the mode register. They are not referenced to
the actual burst. For example, Minimum Read to
Precharge timing is AL + BL/2 where BL is the burst
length set in the mode register and not the actual
burst (which is shorter because of interrupt).
Minimum Write to Precharge timing is WL + BL/ 2 +
t
un-interrupted burst end and not form the end of the
actual burst end.
tW R
WR
HYB18T512[400/800/160]A[C/F]–[3.7/5]
, where
T5
N O P
t
WR
T6
starts with the rising clock after the
N O P
P re ch a rg e
T7
Functional Description
09112003-SDM9-IQ3P
tR P
t
WR
Rev. 1.13, 2004-05
= 3, BL = 4
B a n k A
A ctiva te
T9
DM

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