AK4524VF Asahi Kasei Microsystems, AK4524VF Datasheet
AK4524VF
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AK4524VF Summary of contents
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ASAHI KASEI The AK4524 is a high performance 24bit CODEC for the 96kHz recording system. The ADC has an Enhanced Dual Bit architecture with wide dynamic range. The DAC uses the new developed Advanced Multi Bit architecture and achieves low ...
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ASAHI KASEI n Block Diagram AINL AINR VCOM AOUTL+ AOUTL- AOUTR+ AOUTR- VREF Control Register I/F VA AGND CS CCLK M0050-E-01 ADC HPF DATT DATT DAC SMUTE Clock Gen. & Divider CDTI CIF CLKO XTO XTI Block Diagram - 2 ...
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... ASAHI KASEI n Ordering Guide AK4524VF AKD4524 n Pin Layout VCOM AINR AINL VREF AGND VA (Internal pull down) TEST XTO XTI XTALE LRCK BICK SDTO SDTI M0050-E-01 -10~+70°C 28pin VSOP (0.65mm pitch) Evaluation Board AK4524 6 Top 7 View ...
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ASAHI KASEI No. Pin Name I/O Common Voltage Output Pin, VA/2 1 VCOM O Bias voltage of ADC inputs and DAC outputs. 2 AINR I Rch Analog Input Pin 3 AINL I Lch Analog Input Pin Voltage Reference Input Pin, ...
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ASAHI KASEI (AGND, DGND=0V; Note 1) Parameter Power Supplies: Analog Digital Output Buffer VD-VA Input Current, Any Pin Except Supplies Analog Input Voltage Digital Input Voltage Ambient Temperature (powered applied) Storage Temperature Note:1. All voltages with respect to ground. WARNING: ...
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ASAHI KASEI (Ta=25°C; VA, VD, VT=5.0V; AGND=DGND=0V; VREF=VA; fs=44.1kHz; Signal Frequency =1kHz; 24bit Data; Measurement frequency = 10Hz ~ 20kHz at fs=44.1kHz, 10Hz ~ 40kHz at fs=96kHz; unless otherwise specified) Parameter Input PGA Characteristics: Input Voltage Input Resistance Step Size ...
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ASAHI KASEI Parameter Power Supplies Power Supply Current Normal Operation ( PD = “H”) VA VD+VT (fs=96kHz) Power-down mode ( PD = “L”) VA VD+VT Note: 6. XTALE=”L” and all digital input pins are held VD or DGND. (Ta=25°C; VA, ...
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ASAHI KASEI (Ta=25°C; VA, VD=4.75 ~ 5.25V; VT=2.7 ~ 5.25V) Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage (Iout=-100uA) (Note 10) Low-Level Output Voltage (Iout=100uA) Input Leakage Current Note: 10. Min value is lower voltage of 2.7V or ...
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ASAHI KASEI Parameter Control Interface Timing CIF=”0” CCLK Period CCLK Pulse Width Low Pulse Width High CDTI Setup Time CDTI Hold Time CS “H” Time CS “L” Time CS “” to CCLK “” CCLK “” “” CIF=”1” CCLK ...
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ASAHI KASEI n Timing Diagram MCLK tCLKH LRCK BICK tBCKH CLKO LRCK tBLR BICK tLRS SDTO SDTI M0050-E-01 1/fCLK tCLKL 1/fs tBCK tBCKL tH tL dMCK=tH/(tH+tL) or tL/(tH+tL) Clock Timing tLRB tSDS tSDH Audio Interface Timing (Slave mode ...
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ASAHI KASEI LRCK tMBLR BICK SDTO SDTI CS(CIF=H) CS(CIF=L) tCSS CCLK CDTI CS(CIF=H) CS(CIF=L) CCLK CDTI D3 PD M0050-E-01 tSDS tSDH Audio Interface Timing (Master mode) tCCKL tCCKH tCDS tCDH C1 C0 R/W WRITE Command Input Timing ...
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ASAHI KASEI n System Clock Input The master clock (MCLK) can be either a crystal resonator placed across the XTI and XTO pin, or external clock input to the XTI pin with the XTO pin left floating. The master clock ...
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ASAHI KASEI n Audio Serial Interface Format Five serial modes selected by the DIF0 and DIF1 pins are supported as shown in Table 4. In all modes the serial data has MSB first, 2’s compliment format. The SDTO is clocked ...
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ASAHI KASEI LRCK BICK(64fs) SDTO( SDTI( 23:MSB, 0:LSB Lch Data LRCK BICK(64fs) SDTO( SDTI( ...
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ASAHI KASEI n Input Volume The AK4524 includes two channel independent analog volumes (IPGA) with 37 levels, 0.5dB step in front of ADC and digital volumes (IATT) with 128 levels (including MUTE) after ADC. The control data of both volumes ...
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ASAHI KASEI n De-emphasis Filter The DAC includes the digital de-emphasis filter (tc=50/15us) by IIR filter. This filter corresponds to three frequencies (32kHz, 44.1kHz, 48kHz). This setting is done via contorl register. This filter is always OFF at double speed ...
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ASAHI KASEI n Power Down & Reset The ADC and DAC of AK4524 are placed in the power-down mode by bringing a power down pin, PD “L” and each digital filter is also reset at the same time. The internal ...
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ASAHI KASEI n Relationship between Clock Operation and Power-Down XTALE pin controls the clock outputs. The operation in slave mode is shown Table 8. Table 9 shows the master mode operation. When a crystal oscillator is used, XTALE pin is ...
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ASAHI KASEI n Serial Control Interface The internal registers are written by the 3 wire uP interface pins: CS, CCLK, CDTI. The data on this interface consists of Chip address (2bits, C0/1) Read/Write (1bit), Register address (MSB first, 5bits) and ...
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ASAHI KASEI Control Register Setup Sequence When PD pin goes “L” to “H” upon power-up etc., the AK4524 should operate by the next sequence. In this case, all control registers are set to initial values and ...
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ASAHI KASEI Addr Register Name 01H Reset Control RESET RSTDA: DAC reset 0: Reset 1: Normal Operation The internal timing is reset by “0” and then the AOUTs go VCOM voltage immediately. The OATTs also go “00H”. But the contents ...
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ASAHI KASEI Addr Register Name 03H Deem and Volume Control SMUTE RESET DEM1-0: De-emphasis response (see Table 7) 00: 44.1kHz 01: OFF 10: 48kHz 11: 32kHz Initial: OFF ZTM1-0: Zero crossing time out period select (see Table 6) Initial: 1024fs ...
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ASAHI KASEI Internal Data Gain (dB) (DATT) 255 - 165 - 164 - 163 - 162 - : - 130 - 129 - 128 - 127 8031 126 7775 125 7519 : : 112 4191 111 3999 110 3871 : ...
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ASAHI KASEI Addr Register Name 06H Lch OATT Control 07H Rch OATT Control RESET ATTL/R6-0: DAC ATT Level Refer to Table 11 Initial: 7FH (0dB) The AK4524 includes digital ATT with 128 levels equivalent to ADC’s. The OATTs are set ...
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ASAHI KASEI Internal Data Gain (dB) (DATT) 127 8031 126 7775 125 7519 : : 112 4191 111 3999 110 3871 : : 96 2079 95 1983 94 1919 : : 79 1023 78 975 77 943 : : 64 ...
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ASAHI KASEI Figure 10 & Figure 11 show the system connection diagram. This is an example which the AK4524 operates at X’tal mode. In case of external clock mode, please refer to Figure 11. An evaluation board (AKD4524) is available ...
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ASAHI KASEI 4.75 ~ 5.25V 0.1u 10u Analog Supply + + 10u 0. Audio Controller Figure 11. Typical Connection Diagram (EXT clock mode) 1. Grounding and ...
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ASAHI KASEI 3. Analog Inputs The IPGA inputs are single-ended and the input resistance 5kW (min). The input signal range scales with the VREF voltage and nominally 0.58 x VREF Vpp centerd in the internal common voltage (about VA/2). Usually ...
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ASAHI KASEI AOUT- AOUT+ Figure 13. External 2nd order LPF Example (using dual supply op-amp) AOUT- AOUT+ Figure 14. External low cost 1st order LPF Example (using dual supply op-amp) n Peripheral I/F Example The digital inputs of the AK4524 ...
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ASAHI KASEI 28pin VSOP (Unit: mm) *9.8±0.2 0.675 28 1 0.22 ± 0.1 Seating Plane NOTE: Dimension "*" does not include mold flash Package & Lead frame material Package molding compound: Lead frame material: Lead frame ...
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... AKM harmless from any and all claims arising from the use of said product in the absence of such notification. M0050-E-01 MARKING AKM AK4524VF XXXBYYYYC XXXBYYYYC: data code identifier IMPORTANT NOTICE - 31 - [AK4524] ...