AM79C978 Advanced Micro Devices, AM79C978 Datasheet

AM79C978

Manufacturer Part Number

AM79C978

Description

Single-Chip 1/10 Mbps PCI Home Networking Controller

Manufacturer

Advanced Micro Devices

Datasheet

1.AM79C978.pdf (261 pages)

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Am79C978

PCnet™- Home

Single-Chip 1/10 Mbps PCI Home Networking Controller

DISTINCTIVE CHARACTERISTICS

n Fully integrated 1 Mbps HomePNA Physical

n Fully integrated 10 Mbps PHY interface

n Integrated Fast Ethernet controller for the

Layer (PHY) as defined by Home Phoneline

Networking Alliance (HomePNA) specification

1.1

— Optimized for home networking applications

— In-band control features:

— Register programmable features:

— Comprehensive Auto-Negotiation

— Full-duplex capability

— Optimized for 10BASE-T applications

Peripheral Component Interconnect (PCI) bus

— 32-bit glueless PCI host interface

— Supports PCI clock frequency from DC to

— Supports network operation with PCI clock

— High performance bus mastering

— PCI draft specification revision 2.2 compliant

— Supports PCI Subsystem/Subvendor ID/

over ordinary telephone wire

Adjustable power and speed levels

32 bits of reserved in-band messaging piggy-

backed on Ethernet packet

Power control

Performance registers

Speed control

Major frame timing parameters programma-

ble: ISBI, AID ISBI, pulse width, inter-symbol

time

implementation

33 MHz independent of network clock

from 15 MHz to 33 MHz

architecture with integrated Direct Memory

Access (DMA) Buffer Management Unit for

low CPU and bus utilization

Vendor ID programming through the

EEPROM interface

R f

t AMD’ W b it (

n Dual-speed CSMA/CD (10 Mbps and 100 Mbps)

n Media Independent Interface (MII) for

n Full-duplex operation supported on the MII port

n Supports PC98 and Net PC specifications

) f

— Supports both PCI 5.0-V and 3.3-V signaling

— Plug and Play compatible

— Supports an unlimited PCI burst length

— Big endian and little endian byte alignments

— Implements optional PCI power management

Media Access Controller (MAC) compliant with

IEEE/ANSI 802.3 Ethernet standard

connecting external 10/100 Mbps transceivers

— IEEE 802.3u compliant MII

— Intelligent Auto-Poll™ external PHY status

— Supports both auto-negotiable and non-

— Supports 10BASE-T, 100BASETX/FX,

with independent Transmit (TX) and Receive

(RX) channels

— Implements full OnNow features including

— Implements Magic Packet™ mode

— Magic Packet mode and the physical address

— Supports PCI Bus Power Management

— Supports Advanced Configuration and

— Supports Network Device Class Power

th l t t i f

environments

supported

event (PME) pin

monitor and interrupt

auto-negotiable external PHYs

100BASET4, and 100BASET2 IEEE 802.3

compliant MII PHYs at full-duplex or half-

duplex

pattern matching and link status wake-up

events

loaded from EEPROM at power up without

requiring PCI clock

Interface specification revision 1.1

Power Interface (ACPI) specification version

1.0

Management specification version 1.0a

Publication# 22206

Issue Date: November 1999

Rev: D Amendment/0

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