K4S560432E-TC Samsung semiconductor, K4S560432E-TC Datasheet
K4S560432E-TC
Available stocks
Related parts for K4S560432E-TC
K4S560432E-TC Summary of contents
Page 1
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) 256Mb E-die SDRAM Specification * Samsung Electronics reserves the right to change products or specification without notice. Revision 1.3 September. 2003 CMOS SDRAM Rev. 1.3 September. 2003 ...
Page 2
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) Revision History Revision 1.0 (May. 2003) - First release. Revision 1.1 (June. 2003) - Correct Typo Revision 1.2 (June. 2003) - Added 166MHz speed bin in x16 Revision 1.3 (September. 2003) - Corrected typo in ordering information. CMOS SDRAM Rev. 1.3 September. 2003 ...
Page 3
... I/O transactions are possible on every clock cycle. Range of oper- ating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. Ordering Information Part No. K4S560432E-TC(L)75 K4S560832E-TC(L)75 K4S561632E-TC(L)60/75 Organization Orgainization Max Freq ...
Page 4
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) Package Physical Dimension #54 #1 0.10 MAX 0.004 0. 0.028 #28 #27 22.62 MAX 0.891 22.22 ± 0.10 ± 0.004 0.875 0.008 +0.10 0.30 0.80 -0.05 +0.004 0.0315 0.012 -0.002 54Pin TSOP Package Dimension CMOS SDRAM 0~8°C 0.25 TYP 0.010 +0.075 0.125 -0.035 +0 ...
Page 5
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR CLK CKE * Samsung Electronics reserves the right to change products or specification without notice. Data Input Register 16M 16M ...
Page 6
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) PIN CONFIGURATION (Top view) x8 x16 DQ0 DQ0 V V DDQ DDQ DQ1 N.C DQ2 DQ1 V V SSQ SSQ DQ3 N.C DQ4 DQ2 V V DDQ DDQ DQ5 N.C DQ6 DQ3 V V SSQ SSQ DQ7 N ...
Page 7
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. ...
Page 8
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) DC CHARACTERISTICS (x4, x8) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active) I CC2 Precharge standby current in PS CKE & CLK ≤ V power-down mode I CC2 I CC2 Precharge standby current in ...
Page 9
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) DC CHARACTERISTICS (x16) (Recommended operating condition unless otherwise noted, T Parameter Symbol Operating current I CC1 (One bank active) I CC2 Precharge standby current in power-down mode ...
Page 10
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition Output 870Ω (Fig output load circuit ...
Page 11
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CLK cycle time CLK to valid output delay Output data hold time CLK high pulse width CLK low pulse width Input setup time Input hold time ...
Page 12
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) IBIS SPECIFICATION I Characteristics (Pull-up) OH 100MHz 100MHz Voltage 133MHz 133MHz Min Max (V) I (mA) I (mA) 3.45 -2.4 3.3 -27.3 3.0 0.0 -74.1 2.6 -21.1 -129.2 2.4 -34.1 -153.3 2.0 -58.7 -197.0 1.8 -67.3 -226.2 1.65 -73.0 -248.0 1.5 -77.9 -269.7 1.4 -80.8 -284.3 1.0 -88.6 -344.5 0.0 -93.0 -502.4 I Characteristics (Pull-down) OL 100MHz 100MHz Voltage 133MHz 133MHz Min Max ...
Page 13
... SDRAM 256Mb E-die (x4, x8, x16) SDRAM 256Mb E-die (x4, x8, x16) V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) DD 0.0 0.0 0.2 0.0 0.4 0.0 0.6 0.0 0.7 0.0 0.8 0.0 0.9 0.0 1.0 0.23 1.2 1.34 1.4 3.02 1.6 5.06 1.8 7.35 2.0 9.83 2.2 12.48 2.4 15.30 2.6 18.31 V Clamp @ CLK, CKE, CS, DQM & (V) I (mA) SS -2.6 -57.23 -2.4 -45.77 -2.2 -38.26 -2.0 -31.22 -1.8 -24.58 -1.6 -18.37 -1.4 -12.56 -1.2 -7.57 -1.0 -3.37 -0.9 -1.75 -0.8 -0.58 -0.7 -0.05 -0.6 0.0 -0.4 0.0 -0.2 0.0 0.0 0.0 Minimum V clamp current DD (Referenced Voltage I (mA) Minimum V clamp current ...
Page 14
... MRS can be issued only at all banks precharge state. A new command can be issued after 2 CLK cycles of MRS. 3. Auto refresh functions are as same as CBR refresh of DRAM. The automatical precharge without row precharge command is meant by "Auto". Auto/self refresh can be issued only at all banks precharge state. ...