HYS64-72V2200GU-8 Siemens, HYS64-72V2200GU-8 Datasheet - Page 13

• Manufacturer Part Number: HYS64-72V2200GU-8
• Description: 3.3V 2M x 64/72-Bit 1 BANK SDRAM Module 3.3V 4M x 64/72-Bit 2 BANK SDRAM Module
• Manufacturer: Siemens

SPD-Table:
Semiconductor Group
Byte#
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
0
1
2
3
4
5
6
7
8
9
Number of SPD bytes
Total bytes in Serial PD
Memory Type
Number of Row Addresses (without BS bits)
Number of Column Addresses
Number of DIMM Banks
Module Data Width
Module Data Width (cont’ d)
Module Interface Levels
SDRAM Cycle Time at CL=3
SDRAM Access time from Clock at CL=3
Dimm Config (Error Det/Corr.)
Refresh Rate/Type
SDRAM width, Primary
Error Checking SDRAM data width
Minimum clock delay for back-to-back ran-
dom column address
Burst Length supported
Number of SDRAM banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM module attributes
SDRAM Device Attributes :General
Min. Clock Cycle Time at CAS Latency = 2
Max. data access time from Clock for CL=2
Minimum Clock Cycle Time at CL = 1
Maximum Data Access Time from Clock at
CL=1
Minimum Row Precharge Time
Minimum Row Active to Row Active delay
tRRD
(for x8 SDRAM)
Description
13
1, 2, 4, 8 & full page
SPD Entry Value
non buffered/non
CAS lat. = 2 & 3
Write latency = 0
Vcc tol +/- 10%
CS latency = 0
not supported
not supported
Self-Refresh,
t
none / ECC
ccd
SDRAM
10.0 ns
n/a / x8
10.0 ns
64 / 72
LVTTL
15.6 s
7.0 ns
20 ns
6.0 ns
30 ns
1 / 2
= 1 CLK
reg.
128
256
11
x8
HYS64(72)V2200/4220GU-8/-10
9
0
2
2Mx64
-8-3
A0
FF
FF
1E
04
0B
09
01
00
01
80
01
8F
02
06
01
00
06
A0
70
14
80
08
40
60
00
08
00
01
2Mx72
SDRAM-Modules
-8-3
0B
A0
A0
FF
FF
1E
80
08
04
09
01
00
01
80
08
01
8F
02
06
01
01
00
06
70
14
48
60
02
08
Hex
4Mx64
-8-3
FF
0B
A0
A0
FF
1E
80
08
04
09
02
40
00
01
00
80
08
00
01
8F
02
06
01
01
00
06
70
14
60
4Mx72
-8-3
FF
0B
A0
06
01
06
A0
70
FF
1E
80
08
04
09
02
48
00
01
60
02
80
08
08
01
8F
02
01
00
14