MT46H32M32LFCG-6 IT Micron Semiconductor Products, MT46H32M32LFCG-6 IT Datasheet

MT46H32M32LFCG-6 IT

Manufacturer Part Number

MT46H32M32LFCG-6 IT

Description

Manufacturer

Micron Semiconductor Products

Datasheet

1.MT46H32M32LFCG-6IT.pdf (12 pages)

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Download datasheet (305Kb)

Mobile LPDDR (only)

152-Ball Package-on-Package (PoP) TI-OMAP™

MT46HxxxMxxLxCG

MT46HxxxMxxLxKZ

Features

• Vdd

• Bidirectional data strobe per byte of data (DQS)

• Internal, pipelined double data rate (DDR)

• Differential clock inputs (CK and CK#)

• Commands entered on each positive CK edge

• DQS edge-aligned with data for READs; center-

• 4 internal banks for concurrent operation

• Data masks (DM) for masking write data—one mask

• Programmable burst lengths (BLs): 2, 4, 8, or 16

• Concurrent auto precharge option is supported

• Auto refresh and self refresh modes

• 1.8V LVCMOS-compatible inputs

• On-chip temperature sensor to control self refresh

• Partial-array self refresh (PASR)

• Deep power-down (DPD)

• STATUS REGISTER READ (SRR) supported

• Selectable output drive strength (DS)

• Clock stop capability

• 64ms refresh

Table 1:

PDF: 09005aef833913f1/Source: 09005aef833913d6

ddr_mobile_sdram_only_152b_omap_pop.fm - Rev. D 01/09 EN

‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by

Architecture

Configuration

Refresh count

Row addressing

Column addressing

architecture; 2 data accesses per clock cycle

aligned with data for WRITEs

per byte

rate

Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications.

Vddq = 1.70–1.95V

Configuration Addressing

Notes:

x 4 banks x 4 die

128 Meg x 32

16K (A[13:0])

16 Meg x 16

1K (A[9:0])

1. Quad die stack. Each CS configured with two x16 die connected in parallel to make up a 32-bit-

wide bus.

x 4 banks x 2 die

64 Meg x 32

8K (A[12:0])

1K (A[9:0])

8 Meg x 32

152-Ball x32 Mobile LPDDR (only) PoP (TI-OMAP)

Options

• Vdd/Vddq

• Configuration

• Device version

• Plastic “green” package

• Timing – cycle time

• Operating temperature range

Notes: 1. BL 16: contact factory for availability.

– 1.8V/1.8V

– 128 Meg x 32 (16 Meg x 16 x 4 banks x 4)

– 64 Meg x 32 (8 Meg x 32 x 4 banks x 2)

– 32 Meg x 32 (8 Meg x 32 x 4 banks)

– 16 Meg x 32 (4 Meg x 32 x 4 banks)

– Single die, standard addressing

– 2-die stack, standard addressing

– 4-die stack, standard addressing

– 152-ball VFBGA

– 5ns @ CL = 3

– 5.4ns @ CL = 3

– 6ns @ CL = 3

– Commercial (0° to +70°C)

– Industrial (–40°C to +85°C)

(14mm x 14mm x 1.0mm)

(14mm x 14mm x 1.2mm

Micron Technology, Inc., reserves the right to change products or specifications without notice.

2. Contact factory for remapped SRR output.

32 Meg x 32

8K (A[12:0])

1K (A[9:0])

8 Meg x 32

x 4 banks

16 Meg x 32

8K (A[12:0])

512 (A[8:0])

4 Meg x 32

x 4 banks

Preliminary

Features

Marking

128M32

64M32

32M32

16M32

None

-54

-5

-6

‡

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