MT29F8G08ADBDAH4:D

Manufacturer Part NumberMT29F8G08ADBDAH4:D
Description1GX8 NAND FLASH PLASTIC PBF VFBGA 1.8V ASYNCH/PAGE READ MASS STORAGE
ManufacturerMicron Semiconductor Products
MT29F8G08ADBDAH4:D datasheet
 

Specifications of MT29F8G08ADBDAH4:D

Pack_quantity210Comm_code85423269
Lead_time84Eccn3A991B1A
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NAND Flash Memory
MT29F4G08ABADAH4, MT29F4G08ABADAWP, MT29F4G08ABBDAH4,
MT29F4G08ABBDAHC, MT29F4G16ABADAH4, MT29F4G16ABADAWP,
MT29F4G16ABBDAH4, MT29F4G16ABBDAHC, MT29F8G08ADADAH4,
MT29F8G08ADBDAH4, MT29F8G16ADADAH4, MT29F8G16ADBDAH4,
MT29F16G08AJADAWP
Features
• Open NAND Flash Interface (ONFI) 1.0-compliant
• Single-level cell (SLC) technology
• Organization
– Page size x8: 2112 bytes (2048 + 64 bytes)
– Page size x16: 1056 words (1024 + 32 words)
– Block size: 64 pages (128K + 4K bytes)
– Plane size: 2 planes x 2048 blocks per plane
– Device size: 4Gb: 4096 blocks; 8Gb: 8192 blocks
16Gb: 16,384 blocks
• Asynchronous I/O performance
t
t
RC/
WC: 20ns (3.3V), 25ns (1.8V)
• Array performance
3
– Read page: 25µs
– Program page: 200µs (TYP: 1.8V, 3.3V)
– Erase block: 700µs (TYP)
• Command set: ONFI NAND Flash Protocol
• Advanced command set
4
– Program page cache mode
4
– Read page cache mode
– One-time programmable (OTP) mode
4
– Two-plane commands
– Interleaved die (LUN) operations
– Read unique ID
– Block lock (1.8V only)
– Internal data move
• Operation status byte provides software method for
detecting
– Operation completion
– Pass/fail condition
– Write-protect status
• Ready/Busy# (R/B#) signal provides a hardware
method of detecting operation completion
• WP# signal: Write protect entire device
PDF: 09005aef83b25735
m60a_4gb_nand.pdf – Rev. J 9/11 EN
Products and specifications discussed herein are subject to change by Micron without notice.
4Gb, 8Gb, 16Gb: x8, x16 NAND Flash Memory
• First block (block address 00h) is valid when ship-
ped from factory with ECC. For minimum required
1
ECC, see Error Management.
• Block 0 requires 1-bit ECC if PROGRAM/ERASE cy-
cles are less than 1000
• RESET (FFh) required as first command after pow-
er-on
• Alternate method of device initialization (Nand_In-
it) after power up (contact factory)
• Internal data move operations supported within the
plane from which data is read
• Quality and reliability
– Data retention: 10 years
– Endurance: 100,000 PROGRAM/ERASE cycles
• Operating voltage range
3
– V
: 2.7–3.6V
CC
– V
: 1.7–1.95V
CC
• Operating temperature:
– Commercial: 0°C to +70°C
– Industrial (IT): –40ºC to +85ºC
• Package
– 48-pin TSOP type 1, CPL
– 63-ball VFBGA
Notes:
1. The ONFI 1.0 specification is available at
www.onfi.org.
2. CPL = Center parting line.
3. See Program and Erase Characteristics for
t
R_ECC and
4. These commands supported only with ECC
disabled.
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Features
2
t
PROG_ECC specifications.
© 2009 Micron Technology, Inc. All rights reserved.