73K212AL TDK [TDK Electronics], 73K212AL Datasheet - Page 19

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73K212AL

Manufacturer Part Number
73K212AL
Description
V.22, V.21, Bell 212A, Bell 103 Single-Chip Modem with Integrated Hybrid
Manufacturer
TDK [TDK Electronics]
Datasheet
DYNAMIC CHARACTERISTICS AND TIMING
PARAMETER
GUARD TONE GENERATOR
TIMING (Refer to Timing Diagrams)
* Control for setup is the falling edge of RD or WR . Control for hold is the falling edge of RD or the rising edge
NOTE: Asserting ALE, CS , and RD or WR concurrently can cause unintentional register accesses. When using
of WR .
Tone Accuracy
Tone Level
(Below DPSK Output)
Harmonic Distortion
700 to 2900 Hz
TAL
TLA
TLC
TCL
TRD
TLL
TRDF
TRW
TWW
TDW
TWD
TCKD
TCKW (serial mode)
TDCK (serial mode)
TAC (serial mode)
TCA (serial mode)
TWH (serial mode)
non-8031 compatible processors, care must be taken to prevent this from occurring when designing the
interface logic.
ADD
CS
CS
CS
CS
CONDITION
550 Hz
1800 Hz
550 Hz
1800 Hz
550 Hz
1800 Hz
CS /Address setup before ALE Low
CS hold after ALE low
Address hold after ALE Low
ALE Low to RD/WR Low
RD/WR Control to ALE High
Data out from RD Low
ALE width
Data float after RD High
RD width
WR width
Data setup before WR High
Data hold after WR High
Data out after EXCLK Low
WR after EXCLK Low
Data setup before EXCLK Low
Address setup before control*
Address hold after control*
Data Hold after EXCLK
Single-Chip Modem with Integrated Hybrid
(continued)
19
V.22, V.21, Bell 212A, Bell 103
MIN
-4.0
-7.0
150
150
-20
12
10
10
15
50
50
15
12
50
50
20
0
0
0
NOM
-3.0
-6.0
MAX
+20
-2.0
-5.0
200
-50
-60
70
50
UNIT
Hz
dB
dB
dB
dB
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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