73K212AL TDK [TDK Electronics], 73K212AL Datasheet - Page 3

• Manufacturer Part Number: 73K212AL
• Description: V.22, V.21, Bell 212A, Bell 103 Single-Chip Modem with Integrated Hybrid
• Manufacturer: TDK [TDK Electronics]

Serial data from the demodulator is passed first
through the data descrambler and then through the
SYNC/ASYNC
converter will re-insert any deleted stop bits and
transmit output data at an intra-character rate (bit-to-
bit timing) of no greater than 1219 bit/s. An incoming
break signal (low through two characters) will be
passed through without incorrectly inserting a stop bit.
The SYNC/ASYNC converter also has an extended
overspeed mode which allows selection of an
overspeed range of either +1% or +2.3%. In the
extended overspeed mode, stop bits are output at
7/8 the normal width.
SYNCHRONOUS MODE
The CCITT V.22 standard defines synchronous
operation at 600 and 1200 bit/s. The Bell 212A
standard defines synchronous operation only at
1200 bit/s. Operation is similar to that of the
asynchronous mode except that data must be
synchronized to a provided clock and no variation in
data transfer rate is allowable. Serial input data
appearing at TXD must be valid on the rising edge of
TXCLK.
TXCLK is an internally derived signal in internal
mode and is connected internally to the RXCLK pin
in slave mode. Receive data at the RXD pin is
clocked out on the falling edge of RXCLK. The
ASYNCH/SYNCH converter is bypassed when
synchronous
transmitted out at the same rate as it is input.
DPSK MODULATOR/DEMODULATOR
The 73K222BL modulates a serial bit stream into
di-bit pairs that are represented by four possible
phase shifts as prescribed by the Bell 212A or V.22
standards. The baseband signal is then filtered to
reduce intersymbol interference on the bandlimited
2-wire telephone line. Transmission occurs using
either a 1200 Hz (originate mode) or 2400 Hz carrier
(answer mode). Demodulation is the reverse of the
modulation process, with the incoming analog signal
mode
converter.
is
selected
The
and
SYNC/ASYNC
Single-Chip Modem with Integrated Hybrid
data
is
3
eventually decoded into di-bits and converted back
to a serial bit stream. The demodulator also recovers
the clock which was encoded into the analog signal
during modulation. Demodulation occurs using either
a 1200 Hz carrier (answer mode or ALB originate
mode) or a 2400 Hz carrier (originate mode or ALB
answer mode). The device uses a phase locked loop
coherent demodulation technique for
receiver performance.
FSK MODULATOR/DEMODULATOR
The
modulated analog output signal using two discrete
frequencies to represent the binary data. In Bell 103,
the standard frequencies of 1270 and 1070 Hz
(originate, mark and space) or 2225 and 2025 Hz
(answer, mark and space) are used. V.21 mode
uses 980 and 1180 Hz (originate, mark and space),
or 1650 and 1850Hz (answer, mark and space).
Demodulation
frequencies and decoding them into the appropriate
binary
scrambler/descrambler are bypassed in the Bell 103
or V.21 modes.
PASSBAND FILTERS AND EQUALIZERS
High and low band filters are included to shape the
amplitude and phase response of the transmit and
receive signals and provide compromise delay
equalization and rejection of out-of-band signals in
the
equalization are necessary to compensate for
distortion of the transmission line and to reduce
intersymbol interference in the bandlimited receive
signal. The transmit signal filtering approximates a
75% square root of raised Cosine frequency
response characteristic.
AGC
The automatic gain control maintains a signal level
at the input to the demodulators which is constant
to within 1 dB. It corrects quickly for increases in
signal which would cause clipping and provides a
total receiver dynamic range of > 45 dB.
V.22, V.21, Bell 212A, Bell 103
receive
FSK
value.
modulator
channel.
involves
The
produces
detecting
Amplitude
rate
converter
the
a
and
frequency
(continued)
optimum
received
phase
and