ZL50060 ZARLINK [Zarlink Semiconductor Inc], ZL50060 Datasheet - Page 41

• Manufacturer Part Number: ZL50060
• Description: 16 K-Channel Digital Switch with High Jitter Tolerance, Per Stream Rate Conversion (2, 4, 8, 16, or 32 Mbps), and 64 Inputs and 64 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Figure 14, Local and Backplane Port External High Impedance Control Timing (32Mbps Mode) shows the channel
control bits for L/BCSTo0, L/BCSTo1, L/BCSTo2 and L/BCSTo3.
4.3
When the LORS/BORS input pin is HIGH, the Local/Backplane Output Enable Bit (LE/BE) of the Local/Backplane
Connection Memory has direct per-channel control on the high impedance state of the Local/Backplane output
streams, L/BSTo0-31. Programming a LOW state in the connection memory LE/BE bit will set the stream output of
the device to high impedance for the duration of the channel period. See “Local Connection Memory Bit Definition,”
on page 52 and “Backplane Connection Memory Bit Definition,” on page 53 for programming details.
When the LORS/BORS signal is asserted HIGH, the L/BCSTo0-3 outputs directly the values given in LE/BE.
Figure 14 - Local and Backplane Port External High Impedance Control Timing (32Mbps Mode)
LORS/BORS Asserted HIGH
L/BCSTo0
L/BCSTo1
L/BCSTo2
L/BCSTo3
(32Mbps)
(32Mbps)
L/BSTo0
(32Mbps)
L/BSTo3
L/BSTo2
L/BSTo1
(32Mbs)
FP8o
C8o
Channel 0
bits 7-0
Channel 0
bits 7-0
Channel 0
bits 7-0
Channel 0
bits 7-0
Zarlink Semiconductor Inc.
Channel 1
bits 7-0
Channel 1
bits 7-0
Channel 1
bits 7-0
Channel 1
bits 7-0
ZL50060/1
41
Channel 510
bits 7-0
Channel 510
bits 7-0
Channel 510
bits 7-0
Channel 510
bits 7-0
One C16o cycle
Channel 511
bits 7-0
Channel 511
bits 7-0
Channel 511
bits 7-0
Channel 511
bits 7-0
Data Sheet