TFRA08C13-DB AGERE [Agere Systems], TFRA08C13-DB Datasheet - Page 113

• Manufacturer Part Number: TFRA08C13-DB
• Description: TFRA08C13 OCTAL T1/E1 Framer
• Manufacturer: AGERE [Agere Systems]

Preliminary Data Sheet
October 2000
Lucent Technologies Inc.
Lucent Technologies Inc.
Microprocessor Interface
Microprocessor Interface Register Address Map
The register address space is divided into thirteen (13) contiguous banks of 512 addressable units each. Each
addressable unit is an 8-bit register. These register banks are labeled as REGBANK[0—12]. The register address
map table gives the address range of these register banks and their associated circuit blocks. REGBANK0 contains
the global registers which are common to all the circuit blocks on the TFRA08C13. REGBANK[1—8] are attached
to the framer circuit blocks. REGBANK[9—12] are attached to the FDL circuit blocks. The descriptions of the indi-
vidual register banks can be found in the appropriate sections of this document. In these descriptions, all
addresses are given in hexadecimal. Addresses out of the range specified by Table 54 must not be
addressed. If they are written, they must be written to 0. An inadvertent write to an out-of-range address
may be corrected by a device reset.
Table 54. TFRA08C13 Register Address Map
* Core registers are common to all circuit blocks on the TFRA08C13.
I/O Timing*
The I/O timing specifications for the microprocessor interface are given in Table 55. The microprocessor interface
pins are compatible with CMOS/TTL I/O levels. All outputs, except the data bus D[7:0], are rated for a capacitive
load of 50 pF. The D[7:0] outputs are rated for a 100 pF load.
* See Product Advisory AY99-041 for more information.
Register Bank Label Start Address
REGBANK10
REGBANK12
REGBANK11
REGBANK0
REGBANK1
REGBANK2
REGBANK3
REGBANK4
REGBANK5
REGBANK6
REGBANK7
REGBANK8
REGBANK9
(in Hex)
2E0
3E0
4E0
5E0
6E0
7E0
8E0
9E0
A20
B20
C00
C20
D00
D20
000
200
300
400
500
600
700
800
900
A00
B00
(continued)
End Address
(in Hex)
A0E
A2F
B0E
B2F
C0E
C2F
D0E
D2F
2A6
2FF
3A6
3FF
4A6
4FF
5A6
5FF
6A6
6FF
7A6
7FF
8A6
8FF
9A6
9FF
008
Facility Data Link 1 (FDL1)
Facility Data Link 2 (FDL2)
Facility Data Link 3 (FDL3)
Facility Data Link 4 (FDL4)
Facility Data Link 5 (FDL5)
Facility Data Link 6 (FDL6)
Facility Data Link 7 (FDL7)
Facility Data Link 8 (FDL8)
Octal Global Registers
TFRA08C13 OCTAL T1/E1 Framer
Circuit Block Name
Framer1
Framer2
Framer3
Framer4
Framer5
Framer6
Framer7
Framer8
*
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