TFRA08C13-DB AGERE [Agere Systems], TFRA08C13-DB Datasheet - Page 67

• Manufacturer Part Number: TFRA08C13-DB
• Description: TFRA08C13 OCTAL T1/E1 Framer
• Manufacturer: AGERE [Agere Systems]

Preliminary Data Sheet
October 2000
Lucent Technologies Inc.
Lucent Technologies Inc.
Alarms and Performance Monitoring
Interrupt Generation
A global interrupt (pin AD8) may be generated if enabled by register GREG1. This interrupt is clocked using chan-
nel 1 framer receive line clock (RLCK1). If RLCK1 is absent, the interrupt is clocked using RLCK2, the receive line
clock of channel 2. If both RLCK1 and RLCK2 are absent, clocking of interrupts is controlled by an interval
2.048 MHz clock generated from the CHI clock. Timing of the interrupt is shown in Figure 25. There is no relation
between MPCK (pin AE10) and the interrupt, i.e., MPCK maybe asynchronous with any of the other TFRA08C13
clocks.
Alarm Definition
The receive framer monitors the receive line data for alarm conditions and errored events, and then presents this
information to the system through the microprocessor interface status registers. The transmit framer, to a lesser
degree, monitors the receive system data and presents the information to the system through the microprocessor
interface status registers. Updating of the status registers is controlled by the receive line clock signal. When the
receive loss of clock monitor determines that the receive line clock signal is lost, the system clock is used to clock
the status registers and all status information should be considered corrupted.
Although the precise method of detecting or generating alarm and error signals differs between framing modes, the
functions are essentially the same. The alarm conditions monitored on the received line interface are:
Red alarm or the loss of frame alignment indication (FRM_SR1 bit 0). The red alarm indicates that the receive
frame alignment for the line has been lost and the data cannot be properly extracted. The red alarm is indicated
by the loss of frame condition for the various framing formats as defined in Table 26.
Figure 25. Relation Between RLCK1 and Interrupt (Pin AD8)
INTERRUPT
(PIN AD8)
RLCK1
TFRA08C13 OCTAL T1/E1 Framer
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