TFRA08C13-DB AGERE [Agere Systems], TFRA08C13-DB Datasheet - Page 123

• Manufacturer Part Number: TFRA08C13-DB
• Description: TFRA08C13 OCTAL T1/E1 Framer
• Manufacturer: AGERE [Agere Systems]

Preliminary Data Sheet
October 2000
Lucent Technologies Inc.
Lucent Technologies Inc.
Global Register Architecture
REGBANK0 contains the status and programmable control registers for all global functions. The address of these
registers is 000 (hex) to 009 (hex). These registers control the eight channels of the TFRA08C13.
The register bank architecture is shown in Table 59. The register bank consists of 8-bit registers classified as pri-
mary block interrupt status register, primary block interrupt enable register, global loopback control register, global
terminal control register, device identification register, and global internal interface control register.
Table 59. Global Register Set (0x000—0x009)
* The following section describes the global registers inTable 60—Table 67.
Global Register Structure
Framer Block Interrupt Status Register (GREG0)
A bit set to 1 indicates the block has recently generated an interrupt. This register is cleared on read.
Table 60. Framer Block Interrupt Status Register (GREG0) (000)
Address (hex)
Bit
0
1
2
3
4
5
6
7
Register
Global
000
001
002
003
004
005
006
007
008
009
FRMR1_INT Framer 1 Interrupt. A 1 indicates framer 1 generated an interrupt.
FRMR2_INT Framer 2 Interrupt. A 1 indicates framer 2 generated an interrupt.
FRMR3_INT Framer 3 Interrupt. A 1 indicates framer 3 generated an interrupt.
FRMR4_INT Framer 4 Interrupt. A 1 indicates framer 4 generated an interrupt.
FRMR5_INT Framer 5 Interrupt. A 1 indicates framer 5 generated an interrupt.
FRMR6_INT Framer 6 Interrupt. A 1 indicates framer 6 generated an interrupt.
FRMR7_INT Framer 7 Interrupt. A 1 indicates framer 7 generated an interrupt.
FRMR8_INT Framer 8 Interrupt. A 1 indicates framer 8 generated an interrupt.
Symbol
FDL8_INT
EIPLLCK8
FRMR8IE
FRMR8_I
Reserved
Reserved
FDL8IE
Bit 7
NT
(0)
(0)
(0)
(0)
(0)
(0)
(0)
1
0
0
FDL7_INT
EIPLLCK7
FRMR7IE
DIVMUX0
FRMR7_I
FDL7IE
Bit 6
IPC
NT
(0)
(0)
(0)
(0)
(0)
(0)
(0)
1
0
0
EIPLLCK6
FDL6_INT
DIVMUX1
FRMR6IE
FRMR6_I
Reserved
FDL6IE
Bit 5
NT
(0)
(0)
(0)
(0)
(0)
(0)
(0)
1
0
0
EIPLLCK5
FDL5_INT
DIVMUX2
FRMR5IE
FRMR5_I
FDL5IE
ITSC
Bit 4
NT
(0)
(0)
(0)
(0)
(0)
(0)
(0)
1
0
0
Description
FDL4_INT
EIPLLCK4
FRMR4IE
FRMR4_I
Reserved
Reserved
FDL4E
Bit 3
NT
(0)
(0)
(0)
(0)
(0)
(0)
(0)
TFRA08C13 OCTAL T1/E1 Framer
1
0
0
SECCTRL
EIPLLCK3
FDL3_INT
FRMR3IE
FRMR3_I
LOMUX0
FDL3IE
Bit 2
NT
(0)
(0)
(0)
(0)
(0)
(0)
(0)
0
0
0
0
SECCTRL
EIPLLCK2
FDL2_INT
FRMR2IE
FRMR2_I
LOMUX1
FDL2IE
Bit 1
NT
(0)
(0)
(0)
(0)
(0)
(0)
(0)
1
0
1
0
FDL1_INT
SECCTRL
EIPLLCK1
FRMR1IE
FRMR1_I
LOMUX2
FDL1IE
Bit 0
NT
(0)
(0)
(0)
(0)
(0)
(0)
(0)
2
0
1
1
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