L-FW323-06-DB AGERE [Agere Systems], L-FW323-06-DB Datasheet - Page 82

• Manufacturer Part Number: L-FW323-06-DB
• Description: PCI PHY/Link Open Host Controller Interface
• Manufacturer: AGERE [Agere Systems]

FW323 06 1394a
PCI PHY/Link Open Host Controller Interface
Serial EEPROM Interface
The FW323 features an I
EEPROM. The interface provides a mechanism to store configurable data such as the global unique identification
(GUID) within an external EEPROM.
The interface consists of the ROM_AD and ROM_CLK pins. ROM_CLK is an output clock provided by the FW323
to the external EEPROM. ROM_AD is bidirectional and is used for serial data/control transfers between the FW323
and the external EEPROM.
The FW323 uses this interface to read the contents of the serial EEPROM in response to the first PCI reset after
powerup. The FW323 also makes the serial ROM interface visible to software through the OHCI defined GUID
ROM register. When the FW323 is operational, the GUID ROM register allows software to initiate reads to the
external EEPROM.
The FW323 EEPROM interface has a number of new and updated features that were not present in earlier
revisions of the chip:
1. Improved external interface timing.
2. OHCI soft reset and D3-to-D0 device state transition will not initiate an EEPROM load.
3. Retry of PCI/OHCI/vendor register accesses during an EEPROM load.
4. Load failure and quick EEPROM detection.
5. EEPROM cache.
6. Automatic update of the OHCI 1394 MiniROM field of the GUID_ROM register.
7. CardBus CIS support.
8. Additional EEPROM image formats, including a CardBus format.
For additional detail, refer to the FW322/FW323 06 EEPROM Interface and Start-Up Behavior Application Note.
ac Characteristics of Serial EEPROM Interface Signals
Table 71. ac Characteristics of Serial EEPROM Interface Signals
82
82
t
t
HOLD_EEPROM
t
t
SETUP_START
t
HOLD_START
SETUP_STOP
t
t
SETUP_DATA
t
t
DATA_VALID
HOLD_DATA
f
t
RISE_TIME
FALL_TIME
t
Symbol
ROM_CLK
PW_HIGH
PW_LOW
t
FREE
Frequency of Serial Clock
Width of Serial Clock Pulse Low
Width of Serial Clock Pulse High
Time from When Serial Clock Transitions Low Until EEPROM
Returns Valid Data
Time I
Started
FW323 Hold Time for a Valid Start Condition
FW323 Setup Time for a Valid Start Condition
Data Out Hold Time for the FW323
Data Out Setup Time for the FW323
Rise Time for Serial Clock and Data Out from the FW323
Fall Time for Serial Clock and Data Out from the FW323
FW323 Setup Time for a Valid Stop Condition
Data Out Hold Time for EEPROM
2
C Bus Must be Idle Before a New Transaction Can Be
2
C compliant serial ROM interface that allows for the connection of an external serial
Parameter
Min
200
100
4.7
4.0
0.1
4.7
4.0
4.7
4.7
—
—
—
0
Data Sheet, Rev. 1
Max
300
100
4.5
1.0
—
—
—
—
—
—
—
—
—
December 2005
Agere Systems Inc.
Unit
kHz
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
ns
ns