SST49LF040B334CNHE Silicon Storage Technology, Inc, SST49LF040B334CNHE Datasheet

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SST49LF040B334CNHE

Manufacturer Part Number
SST49LF040B334CNHE
Description
PLCC32
Manufacturer
Silicon Storage Technology, Inc

Specifications of SST49LF040B334CNHE

Date_code
07+
The SST49LF040B flash memory devices are manufac-
FEATURES:
• 4 Mbit SuperFlash Memory Array for Code or
• Conforms to Intel LPC Interface Specification
• Flexible Erase Capability
• Single 3.0-3.6V Read and Write Operations
• Superior Reliability
• Low Power Consumption
• Fast Sector-Erase/Byte-Program Operation
PRODUCT DESCRIPTION
The SST49LF040B flash memory devices are designed to
interface with host controllers (chipsets) that support a low-
pin-count (LPC) interface for BIOS code storage. Two inter-
face modes are supported by the SST49LF040B: LPC
Memory mode for in-system operation compatible with
Intel’s LPC Interface Specification and Parallel Program-
ming (PP) mode to interface with industry-standard pro-
gramming equipment.
tured with SST’s proprietary, high-performance SuperFlash
technology. The split-gate cell design and thick-oxide tun-
neling injector attain greater reliability and manufacturability
compared
SST49LF040B devices significantly improve performance
and reliability, while lowering power consumption. The
SST49LF040B devices write (Program or Erase) with a
single 3.0-3.6V power supply.
©2006 Silicon Storage Technology, Inc.
S71226-03-000
1
Data Storage
– SST49LF040B: 512K x8 (4 Mbit)
– Supports Single-Byte LPC Memory Cycle
– Uniform 4 KByte sectors
– Uniform 64 KByte overlay blocks
– Chip-Erase for PP Mode Only
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
– Active Read Current: 6 mA (typical)
– Standby Current: 10 µA (typical)
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Byte-Program Time: 14 µs (typical)
– Chip Rewrite Time: 8 seconds (typical)
– Single-pulse Program or Erase
– Internal timing generation
with
5/06
alternative
SST49LF040B4Mb LPC Flash memory
4 Mbit LPC Flash
approaches.
SST49LF040B
The
The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.
• Two Operational Modes
• LPC Interface Mode
• Parallel Programming (PP) Mode
• CMOS and PCI I/O Compatibility
• Packages Available
• All non-Pb (lead-free) devices are RoHS compliant
The SST49LF040B use less energy during Erase and Pro-
gram than alternative flash memory technologies. The total
energy consumed is a function of the applied voltage, cur-
rent and time of application. Since for any given voltage
range the SuperFlash technology uses less current to pro-
gram and has a shorter erase time, the total energy con-
sumed during any Erase or Program operation is less than
alternative flash memory technologies.
The SuperFlash technology provides fixed Erase and Pro-
gram times, independent of the number of Erase/Program
cycles that have occurred. This means the system software
or hardware does not have to be calibrated or correlated to
the cumulative number of Erase cycles as is necessary
with alternative flash memory technologies, whose Erase
and Program times increase with accumulated Erase/Pro-
gram cycles.
– Low Pin Count (LPC) interface mode for
– Parallel Programming (PP) mode for fast
– LPC bus interface supporting byte Read and
– 33 MHz clock frequency operation
– WP# and TBL# pins provide hardware write
– Block Locking Registers for individual block
– JEDEC Standard SDP Command Set
– Data# Polling and Toggle Bit for End-of-Write
– 5 GPI pins for system design flexibility
– 4 ID pins for multi-chip selection
– 11-pin multiplexed address and 8-pin data
– Supports fast In-System or PROM programming
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
in-system operation
production programming
Write
protection for entire chip and/or top Boot Block
Write-Lock and Lock-Down protection
detection
I/O interface
for manufacturing
These specifications are subject to change without notice.
Intel is a registered trademark of Intel Corporation.
Advance Information

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